AIM 65 Revisions and circuit diagrams

AIM 65 Revisions
(list supplied by David Colglazier, who contributed much to the AIM 65 pages, thanks!)

Rev.0 One has no document number or revision so I (David) have to assume this is the original document!

Rev.1 is dated Feb. 1979 and contains a change in Z36 adding Z29-12pin & Z20-6pin 4.7K pull-up resistors at Z-36pins 10 & 15 in the lower left corner of schematic. Z20 is at Z32’s lower left (R6522VIA) Lower left pins 18 & 40.

Rev.2 is dated July1980 and contains two additional outputs to the J1 application connector putting +24V on pin Z and –12V on pin 22.

Rev.3 is dated April 1980 and adds Z38 & Z39 (74LS32’s) between Z27 (74LS138 ROM address decoder) and they are clocked by the inverted system phase two (not Ø2). There is an error in that Z38 is shown with two pin 8,9,10 buffers at Z23 & Z22. I assume one is contained in Z39. This is in fact corrected in Rev. 4. Also, the system clock portion has be redesigned and J8 has been added to S3 (Keyboard/TTY) switch, J7 to S2 (Run/Step) switch, & J6 to S1 (Reset) switch.

Rev.4 is dated Jun 1983 and corrects the gate labeling problem Z38 and changes the values of R3, R4, R5 in the clock circuit from 3.3K, 1.8K, 1.8K to 15K, 3.0K, 1.5K respectively.

Rev.5 I (David) found a copy of this so I posted the taped up version I got from Dynatem and also posted an image of the poster that a customer kindly sent to me. There were considerable changes in that the oscillator was changed to a metal can type and the RAM was upgraded to the more common byte-wide 24/28 pin types with options for 2732 and 2532 EPROMs.

Large format scan of Circuit diagram AIM 65 Poster