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Information on this page:
Known 6530 variants
6530 replacement for Commodore drives
6530 replacement in the KIM-1 and Micro-KIM
6530 replacement in the Gottlieb soundsystems, the MIOT
6530’s KIM-1 specification
The 6530, nick named RRIOT is quite a special IC in the 65xx family.
Timer, RAM (64 byte), ROM, I/O, Counter in one IC. It has a factory mask programmed ROM and the locations of its I/O and RAM and ROM are determined also in the factory.
The 6530 is found in amongs others the KIM-1 (6530 02, 6530 03), a Chess system with MicroChess by Peter Jennings (6530 24) and variants are used in Commodore disk drives.
The 6532 is missing the ROM and is larger at RAM is 128 byte. I/O and timer are functional identical to the 6530. The nickname is RIOT, and it is a general purpose I/O device in the 6502 family. Very popular in e.g. the Atari 2600, and many clone KIM-1’s.
There is a datasheet for an IC called the 6531, RRIOC for RAM ROM I/O Counter. I have never seen it in the wild though, but seen references to pinball machines using it.
The 6530 was produced by most 6502 manufactures, from MOS Technology/Commodore SG to Rockwell and Synertek. All production datasheets that I have seen afaik identical, here I present some clean Rockwell datasheets. The first one is a preliminary MOS datasheet for the MCS6530, missing the ordering pages of the production version.
MOS Technology preliminary MCS6530
Rockwell 6530 RRIOT
How to avoid timer interrupts during reset of the 6502
Known 6530 variants
6530-002 KIM-1 listing in KIM-1 Users manual
6530-003 KIM-1 listing in KIM-1 Users manual
6530-004 TIM Terminal Monitor, see the TIM page
6530-005 According this OSI appnote this is an unprogrammed version of the 6530 TIM. I have also seen ads for this part without further description of what this is.
It has the 16 I/O lines, 64 word RAM and the timer, which can generate an IRQ. One can assume the ROM is empty.
6530-009 Allied Leisure pinball (IC5)
6530-010 Allied Leisure pinball (IC6)
6530-011 Allied Leisure / Fascination pinball (IC3)
6530-12 or 6530-13 were used in the Gottlieb System 1 sound boards
6530-14 was used in the Gottlieb System 80 series sound boards.
6530-024 Commodore CHESSmate (based upon Peter Jennings MicroChess)
6530-241 MIOT in pinball machines
6530-243 MIOT in pinball machines
901466-01 6530-??? DOS 1.0 Shugart SA390 2040, 3040 and 4040
901466-02 6530-028 DOS 1.2 Shugart SA390 2040, 3040 and 4040
901466-04 6530-034 DOS 2.0 DOS 2.1 Shugart SA390
901483-02 6530-036 DOS 2.5
901483-03 6530-038 DOS 2.5 Micropolis 1006-II (8050)
901483-04 6530-039 DOS 2.5 Tandon TM100-3M (8050)
901884-01 6530-040 DOS 2.7 Tandon TM100-3M (8050) Tandon TM100-4M (8250)
901885-01 6530-044 DOS 2.7 Micropolis ???
901885-04 6530-047 DOS 2.7 Micropolis 1006-II (8050) Micropolis 1006-IV (8250) Micropolis 1106-II (Safari, mit Garagentor, 8050) Micropolis 1106-IV (Safari, mit Garagentor, 8250)
901869-01 6530-048 DOS 2.7 M.P.I. 101SM (8050)M.P.I. 102?? (8250)
251256-02 6530-050 DOS 2.7 Matsushita JU-570-2 (8250LP)
251257-02A 2716 DOS 2.7 Matsushita JU-570 (SFD-1001) Matsushita JU-570-2 (SFD-1001)
251474-01B 2716 DOS 2.7 Matsushita JU-570-2 (8250LP)
Via an adapter board Commodore reused older 6530’s with new firmware by disabling the built in ROM and adding a 2716.
See Zimmers Commodore archive. Note that not just any 6530 can be used in this way, only the 6530’s from the Commodore diskdrives. A more general approach with a 6532 is described below.
6530 replacement for Commodore drives
What is it?
Various IEEE dual floppy drive have a 6530 on board. This is a masked programmed IC, for details read this document first. There is only one problem with this IC: if it breaks down, new ones aren’t available anymore and second handed ones are rare. Good reasons to develop a replacement.
Attention: Commodore produced various 6530s, for example the ones used in the KIM-1. This design cannot be used to replace these ones, it is only meant to replace the 6530 in the following drives:
First some credits
My (Ruud Baltissen) prototype did not work so I asked the CBM-Hackers for help. Gerrit Heitsch, Gordon Steemson and Martin Hoffmann-Vetter both pointed me to some critical errors in the design. Thank you very much!
The main reason for developing a 6530 replacement was running out of 6530 spares. Unfortunately it wasn’t as simple as with building the KIM-1 replica.
The 6530 can be divided in three parts:
– the ROM
– the RAM
– the I/O
The design: the ROM
One of the great helps here was this schematic found at www.zimmmers.net. For selecting the ROM, the input /RS0 must be set to (L) and the input /CS2 must be set to (H). So I used /RS0 in the first place to enable the EPROM on my PCB by tying these inputs directly to /RS0.
I noticed that the 8250LP and SFD-1001 have a little PCB on the place of the 6530. On this PCB you will find a 6530, an EPROM and a 74LS04. The reason for this PCB was that Commodore needed to update the ROM for one or another reason. And probably it was cheaper to create this PCB than producing new 6530’s.
Anyway, the CS input of the EPROM has been connected to /RS0 of the original socket. The /RS0 input of the original 6530 has been connected to +5V. This only confirmed that my idea how /RS0 should be used was correct.
One gate of the 74LS14 is used to invert PHI2 and the result is used to control the OE input of the EPROM. This construction is needed because there are two 6502s on the main board. Each 6502 has its own address bus but both 6502s share the same data bus. This is made possible because the second 6502 runs on the inverted clock of the first one. The inverted PHI2 on the OE input makes sure that the EPROM only outputs its data when the right 6502 is in command.
The design: the mapping of the RAM and the I/O
If you have another look at the schematic you will see that both the 6532 and the 6522 share the same Chip Select line coming from output 0 of the on board 74LS42. My first impression: quite confussing!
Most helpfull after all appeared to be the disassembly I made of the disk controller of the 8250. The memory map for the disk part looks like this:
$0000 – $0029 : 6530 RAM
$0040 – $004D : 6522 registers
$0080 – $008F : 6530 registers
$0100 – $01FF : possible stack
We know the 6530 has 64 bytes of memory on board so we can assume:
$0000 – $003F : 6530 RAM
The input /RS of the 6532 tells it when to select RAM or I/O. Connecting it to A7 makes sure that the RAM and the I/O of the 6532 fit in the above table.
The I/O and memory of the 6530 are mapped to the first KB, $0000 – $0400. Having found no further decoding, it means everything should be mirrored every 256 bytes. So the memory mapped to $0000 – $0040 should also appeare at $0100 – $013F. And this is confirmed by the source code: the Stack pointer is set at $3F.
Then what about the 6522? Here we run into a very strange thing: as said before, the 6522 shares the Chip Select line for its negative /CS input with the 6530. The 6522’s positive CS input is connected to address line A6. This means that the 6522 is only active within the range $0040 – $007F, which is confirmed by the disassembly. Due to mirroring it is active within $00C0 – $00FF as well. And further it is also mirrored every 256 bytes within the first KB, just like the 6530.
And now the puzzling thing: when the range $0040 – $007F (read: 6522) is selected, the 6530 is selected as well and yet there is no conflict. Conclusion: a circuit inside the 6530 takes care of not selecting the 6530 for this range.
So we must take care that the 6532 is not selected when the 6522 is. This is realized by inverting A6 and connecting the result to the CS1 input of the 6532.
The design: the I/O
The internal mapping I/O of the 6532 is not the same as the mapping of the I/O of the 6530. For exact details, please see the page about the KIM-1 clones. To make things work the original idea was to invert address line A4 towards the 6532. Although this will work under normal circumstances, it won’t the moment a program addresses a mirror address. The OR gates IC4c and IC4d take care of that.
Maybe you noticed the connection between PB7 and IRQ, I read about that construction in some documants I received with my KIM. I haven’t any idea if this is present in the 6530 for drives. So far I my drives functions fine with it.
I think the only explanation that is needed is about the wiring of the EPROM. All unneeded wires are wired to +5V. This enables you to use any EPROM from 2716 to 27512. The original file you will need is only 1 KB. You have to program it in top 1 KB of the EPROM. If using a 2764 it must be programmed in $1C000/$1FFFF. You will find the binary here.
Attention: the ROM of the SFD-1001 is 2 KB, you should only use the first 1 KB. Check this with a tool! (for example: DEBUG under DOS)
The Eagle schematics as ZIP file.
Replace the 6530 in a KIM-1
The troublemaker: 6530
The KIM-1 has two 6530s on board. For more info about this IC, please read the datasheet. Anybody who is a little bit familiar with the hardware market can tell you that you cannot buy the 6530 anymore. Happily enough there is another IC available which you could call its brother: the 6532. The 6532 has 16 I/O-lines, an internal timer and 128 bytes of RAM on board, but no ROM. The internal ROM of the 6530 can be selected independently from the I/O. So for this project we’ll use an external EPROM as replacement. The pin out of the 6532 is completely different but that should not be a problem.
The next difference is the fact that the 6532 has a separate IRQ and PB7 line. As we will see, the functionality of both lines is the same as with the 6530. To create the same circumstances we only have to connect them together.
The third difference is the availability of PB6 with a 6532. See it as a bonus as I haven’t found any reason how it could jeopardize our project.
The fourth difference is that it is possible to generate an interrupt depending on the behaviour of PA7. But this is an option, which is out of function by default after a reset.
The last and major difference however lays in the way the registers are selected:
function: RS: A6: A5: A4: A3: A2: A1: A0: R/W: RAM 0 x x x x x x x x DRA 1 x x x x 0 0 0 x A DDRA 1 x x x x 0 0 1 x B DRB 1 x x x x 0 1 0 x C DDRB 1 x x x x 0 1 1 x D PA7, IRQ off, neg edge 1 x x 0 x 1 0 0 0 F PA7, IRQ off, pos edge 1 x x 0 x 1 0 1 0 G PA7, IRQ on, neg edge 1 x x 0 x 1 1 0 0 H PA7, IRQ on, pos edge 1 x x 0 x 1 1 1 0 I read interrupt flag 1 x x x x 1 x 1 1 E read timer, IRQ off 1 x x x 0 1 x 0 1 J read timer, IRQ on 1 x x x 1 1 x 0 1 K Clock / 1, IRQ off 1 x x 1 0 1 0 0 0 L Clock / 8, IRQ off 1 x x 1 0 1 0 1 0 M Clock / 64, IRQ off 1 x x 1 0 1 1 0 0 N Clock / 1024, IRQ off 1 x x 1 0 1 1 1 0 O Clock / 1, IRQ on 1 x x 1 1 1 0 0 0 P Clock / 8, IRQ on 1 x x 1 1 1 0 1 0 R Clock / 64, IRQ on 1 x x 1 1 1 1 0 0 S Clock / 1024, IRQ on 1 x x 1 1 1 1 1 0 T
In total 5 address lines are used, meaning 32 registers. But 11 of the 19 registers have one or more mirrors.
Read: J E J E K E K E J E J E K E K E Write: F G H I F G H I L M N O P R S T R/W: A B C D A B C D A B C D A B C D
As we can see, the last 16 registers equal the 16 of the 6530 itself. So now we have to develop some logic which will do the following:
- The 6532 is only visible within a range of 128 bytes
- The first 16 bytes represent register 16 to 31
- The next 48 bytes are mirrors of the first 16
- The last 64 bytes appear as RAM
- Input A6 won’t be used and can be tied to GND
- Input A4 is connected to address line A4 of the 6502 via an inverter.
- A 74LS138/74LS08 construction or equivalent enables the RS- and CS-lines at the right moment.
ROM and RAM
Here we have a luxury problem. We only need 2K of (EP)ROM like the 2716. The problem is that the 2716 is hard to find and more expansive then the 2764 or its bigger brothers. When we use a bigger EPROM we only have to tie the unused address lines to GND. The same problem occurs with the RAM.
If we have to use bigger RAMs or EPROMs anyway, it is quite easy to use other parts of that chip by OR-wiring the CS-line with more Kx-outputs of the main 74145. (Don’t forget the address lines!) In case of the EPROM we also can tie switches to the surplus address lines and have the advantage of a multi-KERNAL system.
Source codes of the ROM
Available at this source of the ROMS Should be 100% OK.
Schematics of the new KIM-1
Available here as a GIF-file.
What are the major differences with the original circuit:
- Replacement of the 6530s by 6532s.
- Replacement of the 6108 RAM-ICs by one 6264 or equivalent 8K*8 SRAM.
- Adding an EPROM.
- Adding a 74LS138 to decode the RAM and I/O of the 6532s.
- Combining K6 and K7 to one line, dropping the resistor for K6.
- Adding jumpers to enable combining other K-lines as well.
You may notice that Ruud did not change things which are more or less obvious like replacing the clock circuit by a module or replacing the various 74XX TTL-ICs by their LS or HCT equivalents.
In the circuit the 74ls138 part is missing alas.
The Micro-KIM, see the whole story here, is another variant of a KIM-1 with the original ROMS and 6532 instead of 6530.
See the complete circuit (version 2009!) here.
Gottlieb multimode sound board systems 6530 replacement
The Gottlieb pinball machines used a sound system made up of a 6503 CPU and a 6530 with D/A converter.
6530-12 or 6530-13 were used in the Gottlieb System 1 sound boards
6530-14 was used in the Gottlieb System 80 series sound boards
A replacement adapter board is produced to repair the often faulty 6530 IC, called the MIOT.
Here is the MIOT manual with complete information on the board.
More information this pinball site, they sell this board!
6530’s KIM-1 specification
(Thanks to J Coville)
Back in the day, a designer ordering a custom 6530 would have to specify certain parameters in addition to the ROM contents. During my KIM-1 restoration effort, I found a datasheet for the Synertek version of the part. The datasheet has quite a bit of information describing how to provide the ROM contents. There is also a form for “Additional Pattern Information” (tables to describe the desired chip-select and addressing information). They look like this:
Chip Select Code (Check one square in each block)
ROM/RAM/I-O SELECTS (Specify H or L or N (don’t care) in each box.)
As best as I can determine, the designers of the KIM-1 filled out the tables for the RRIOTs like so:
In a KIM-1, K5 is asserted low by addresses 1400-17FF. It is connected to the CS1 lines of both the 6530-002 and 6530-003. A9 and A8 need to be 1 for all I/O and RAM, and A6 and A7 determine which chip and I/O or RAM you get:
0001 0111 00XX XXXX = 1700 – 173F = 6530-003 I/O
0001 0111 01XX XXXX = 1740 – 177F = 6530-002 I/O
0001 0111 10XX XXXX = 1780 – 17BF = 6530-003 RAM
0001 0111 11XX XXXX = 17C0 – 17FF = 6530-002 RAM
The RS lines are connected to different select lines, K6 for 6530-003 and K7 for 6530-002, this gives:
0001 10XX XXXX XXXX = 1800 – 1BFF = 6530-003 ROM (1k)
0001 11XX XXXX XXXX = 1C00 – 1FFF = 6530-002 ROM (1k)
All these values agree with the KIM-1 memory map documentation.