0041 BRK AND NMI ENTRY POINTS TO TIM 0042 ------------------------------- 0043 0044 TIM IS NORMALLY ENTERED WHEN A 'BRK' INSTRUKTION IS 0045 ENCOUNTERED DURING PROGRAM EXECUTION. AT THAT 0046 TIME CPU REGISTERS ARE OUTPUT: PC F A X Y SP 0047 AND CONTROL IS GIVEN TO THE KEYBOARD. 0048 USER MAY ENTER TIM BY PROGRAMMED BRK OR INDUCED NMI. NMI 0049 ENTRIES CAUSE A '#' TO PRECEDE THE '.' IN THE CPU REGISTER 0050 PRINTOUT FORMAT 0051 0052 NON-BRK INTRO (EXTERNAL DEVICE) INTERRUPT HANDLING 0053 -------------------------------------------------- 0054 0055 A NON-BRK INTRO INTERRUPT CAUSES AN INDIRECT JUMP TO THE ADDRESS 0056 LOCATED AT 'UINT' (HEX FFF8). THIS LOCATION CAN BE SET 0057 USING THE ALTER CMD, OR LOADED AUTOMATICALLY IN PAPER TAPE 0058 FROM WITH THE LH CMD IF THE USER ASSIGNS HIS INTRO INTERRUPT 0059 VECTOR TO $FFF8 IN THE SOURCE ASSEMBLY PROGRAM. 0060 IF NOT RESET BY THE USER, UINT IS SET TO CAUSE EXTERNAL 0061 DEVICE INTERRUPTS TO ENTER TIM AS NMI'S. I.E., 0062 IF A NMI OCOURS WITHOUT AN INDUCED NMI SIGNAL, IT IS 0063 AN EXTERNAL DEVICE INTERRUPT. 0064 0065 SETTING AND RESETTING PROGRAM BREAKPOINTS 0066 ----------------------------------------- 0067 0068 BREAKPOINTS ARE SET AND RESET USING THE MEMORY DISPLAY 0069 AND ALTER COMMANDS. BRK HAS A '00' OPERATION CODE. 0070 TO SET A BREAKPOINT SIMPLY DISPLAY THE MEMORY LOCATION 0071 (FIRST INSTRUCTION BYTE) AT WHICH THE BREAKPOINT IS 0072 TO BE PLACED THEN ALTER THE LOCATION TO '00'. THERE IS 0073 NO LIMIT TO THE NUMBER OF BREAKPOINTS THAT CAN BE 0074 ACTIVE AT ONE TIME. 0075 TO RESET A BREAKPOINT, RESTORE THE ALTERED MEMORY LOCATION 0076 TO ITS ORIGINAL VALUE. 0077 WHEN AND IF A BREAKPOINT IS ENCOUNTERED DURING EXECUTION, 0078 THE BREAKPOINT DATA PRECEDEC BY AN ':' IS DISPLAYED. 0079 THE PROGRAM COUNTER VALUE DISPLAYED IS THE BRK 0080 INSTRUCTION LOCATION + 1.
0140 7000 85 F9 NMINT STA ACC 0141 7002 A9 23 LDA #'#' ; SET A=# TO INDICATE NMINT ENTRY 0142 7004 D0 55 BNE B3 ; JMP B3 0143 7006 ;
0190 7050 ; 0191 7050 58 CLI ; ENABLE INTS 0192 7051 00 BRK ; ENTER TIM BY BRK 0193 7052
; 0194 7052 85 F9 INTRQ STA ACC ; SAVE ACC 0195 7054 68 PLA ; FLAGS TO A 0196 7055 48 PHA ; RESTORE STACK STATUS 0197 7056 29 10 AND #$10 ; TEST BRK FLAG 0198 7058 F0 27 BEQ BX ; USER INTERRUPT 0199 705A ; 0200 705A 0A ASL A ; SET A=SPACE (10 X 2 = 2C) 0201 705B 85 FE B3 STA TMPC ; SAVE INT TYPE FLAG 0202 705D D8 CLD ; CLEAR DECIMAL MODE 0203 705E 4A LSR A ; # IS ODD, SPACE IS EVEN 0204 705F ; SET CY FOR PC BRK CORRECTION 0205 705F ; 0206 705F 86 FA STX XR ; SAVE X 0207 7061 84 FB STY YR ; Y 0208 7063 68 PLA 0209 7064 85 F8 STA FLGS ; FLAGS 0210 7066 68 PLA 0211 7067 69 FF ADC #$FF ; CY SET TO PC-1 FOR BRK 0212 7069 85 F6 STA PCL 0213 706B 68 PLA 0214 706C 69 FF ADC #$FF 0215 706E 85 F7 STA PCH 0216 7070 BA TSX 0217 7071 86 FC STX SP ; SAVE ORIG SP 0218 7073 ; 0219 7073 20 8A 72 B5 JSR CRLF 0220 7076 A6 FE LDX TMPC 0221 7078 ; 0222 7078 A9 2A LDA #'*' 0223 707A 20 C0 72 JSR WRTWO 0224 707D A9 52 LDA #'R' ; SET FOR R DISPLAY TO PERMIT 0225 707F D0 16 BNE S0 ; IMMEDIATE ALTER FOLLOWING BREAKPOINT. 0226 7081 ; 0227 7081 A5 F9 BX LDA ACC 0228 7083 6C F8 FF JMP (UINT) ; CONTROL TO USER INTRO SERVICE ROUTINE
See also:
Jolt with 4K and power supply
With thanks to Jonathan Chapman of Glitchworks who found a Jolt system, here images of a Jolt with 4K memory, an experim...
TERC KIM-1 Interface set
A recent acquisition, the TERC (Technical Education Research Centers) KIM-1 Interface set. An educational tool to work w...
6502 tester NMOS CMOS 1-8MHz
The 6502 W65C02 6502C CPU tester NMOS / CMOS 1-8MHz is a CPU tester for 40 pin 6502/65C02 and WD65C02 and Sally.
The...
680x/650x Test system
The 680x/650x Test system allows to test, with the CPU itself performing the test, the MC680X and MCS650X families.
T...