EagleCAD schenatics archive download
Imported in Kicad, exported as SVG images on this page:
Logic concept
Clock Generator
Reset
RS0
A0
A9
CS1 Latch
RW
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PB7 driver/buffer
a href="http://retro.hansotten.nl/wp-content/uploads/2021/11/6530-004_dissect_9-6530-004_dissect_9.svg">
PB6 driver/buffer
PB0 driver/buffer
PLA
Some logic
I/O control
I/O logic, Bit 7
Timer control
Predivider
Timer (don countyer)
RAM row buffer/driver
ROM
See also:
KIM-100
The KIM-100 is a homemade KIM-1 to S-100 bus system. Well designed, well documented and with a professional look.
Pho...
MTU K-1007 PET MTU bus interface
The K-1007-1-PET is an interface between the PET 2001 and the MTU/KIM-1 bus. This allows MTU products to be used on the ...
MTU Catalogs, Product Descriptions and Newsletters
Here you can find the product announcements from MTU. Starting with KIM-1 products like the K-1008 Visable memory in 197...
MTU K-1005 Card File and Motherboard using KIM/MTU bus
A passive card cage and 4 -slot bus for KIM-1, SYM-1, AIM 65 and PET Commodore.
Note that the KIM/MTU bus is stil...