Credits to Ruud Baltissen for the idea and details. ‘I’ means Ruud in this page!
RRIOTs are mask programmed for address selection, choices are:
Pin 18 PB6 or CS1
Pin 19 PB5 or CS2
Pin 17 PB7 can have a pullup
ROM selection on RS0, CS1 und CS2 s
RAM on RS0, CS1, CS2, A9, A8, A7 and A6
I/O on RS0, CS1, CS2, A9, A8, A7 and A6
See the various 6530/6532 datasheets for (some) more detail.
The troublemaker: 6530, detailed background information
The KIM-1 has two 6530s on board. For more info about this IC, please read the datasheet. Anybody who is a little bit familiar with the hardware market can tell you that you cannot buy the 6530 anymore. Happily enough there is another IC available which you could call its brother: the 6532. The 6532 has 16 I/O-lines, an internal timer and 128 bytes of RAM on board, but no ROM. The internal ROM of the 6530 can be selected independently from the I/O. So for this project we’ll use an external EPROM as replacement. The pin out of the 6532 is completely different but that should not be a problem.
The next difference is the fact that the 6532 has a separate IRQ and PB7 line. As we will see, the functionality of both lines is the same as with the 6530. To create the same circumstances we only have to connect them together.
The third difference is the availability of PB6 with a 6532. See it as a bonus as I haven’t found any reason how it could jeopardize our project.
The fourth difference is that it is possible to generate an interrupt depending on the behaviour of PA7. But this is an option, which is out of function by default after a reset.
The last and major difference however lays in the way the registers are selected:
function: RS: A6: A5: A4: A3: A2: A1: A0: R/W:
RAM 0 x x x x x x x x
DRA 1 x x x x 0 0 0 x A
DDRA 1 x x x x 0 0 1 x B
DRB 1 x x x x 0 1 0 x C
DDRB 1 x x x x 0 1 1 x D
PA7, IRQ off,
neg edge 1 x x 0 x 1 0 0 0 F
PA7, IRQ off,
pos edge 1 x x 0 x 1 0 1 0 G
PA7, IRQ on,
neg edge 1 x x 0 x 1 1 0 0 H
PA7, IRQ on,
pos edge 1 x x 0 x 1 1 1 0 I
read interrupt
flag 1 x x x x 1 x 1 1 E
read timer,
IRQ off 1 x x x 0 1 x 0 1 J
read timer,
IRQ on 1 x x x 1 1 x 0 1 K
Clock / 1,
IRQ off 1 x x 1 0 1 0 0 0 L
Clock / 8,
IRQ off 1 x x 1 0 1 0 1 0 M
Clock / 64,
IRQ off 1 x x 1 0 1 1 0 0 N
Clock / 1024,
IRQ off 1 x x 1 0 1 1 1 0 O
Clock / 1,
IRQ on 1 x x 1 1 1 0 0 0 P
Clock / 8,
IRQ on 1 x x 1 1 1 0 1 0 R
Clock / 64,
IRQ on 1 x x 1 1 1 1 0 0 S
Clock / 1024,
IRQ on 1 x x 1 1 1 1 1 0 T
In total 5 address lines are used, meaning 32 registers.
But 11 of the 19 registers have one or more mirrors.
Read: J E J E K E K E J E J E K E K E
Write: F G H I F G H I L M N O P R S T
R/W: A B C D A B C D A B C D A B C D
As we can see, the last 16 registers equal the 16 of the 6530 itself.
So now we have to develop some logic which will do the following:
The 6532 is only visible within a range of 128 bytes
The first 16 bytes represent register 16 to 31
The next 48 bytes are mirrors of the first 16
The last 64 bytes appear as RAM
Conclusion:
Input A6 won’t be used and can be tied to GND
Input A4 is connected to address line A4 of the 6502 via an inverter.
A 74LS138/74LS08 construction or equivalent enables the RS- and CS-lines at the right moment.
ROM and RAM
Here we have a luxury problem. We only need 2K of (EP)ROM like the 2716. The problem is that the 2716 is hard to find and more expansive then the 2764 or its bigger brothers. When we use a bigger EPROM we only have to tie the unused address lines to GND. The same problem occurs with the RAM.
If we have to use bigger RAMs or EPROMs anyway, it is quite easy to use other parts of that chip by OR-wiring the CS-line with more Kx-outputs of the main 74145. (Don’t forget the address lines!) In case of the EPROM we also can tie switches to the surplus address lines and have the advantage of a multi-KERNAL system.
Schematics of the new KIM-1
What are the major differences with the original circuit:
Replacement of the 6530s by 6532s.
Replacement of the 6108 RAM-ICs by one 6264 or equivalent 8K*8 SRAM.
Adding an EPROM.
Adding a 74LS138 to decode the RAM and I/O of the 6532s.
Combining K6 and K7 to one line, dropping the resistor for K6.
Adding jumpers to enable combining other K-lines as well.
You may notice that Ruud did not change things which are more or less obvious like replacing the clock circuit by a module or replacing the various 74XX TTL-ICs by their LS or HCT equivalents.
6530’s KIM-1 specification
(Thanks to J Coville)
Back in the day, a designer ordering a custom 6530 would have to specify certain parameters in addition to the ROM contents. During my KIM-1 restoration effort, I found a datasheet for the Synertek version of the part. The datasheet has quite a bit of information describing how to provide the ROM contents. There is also a form for “Additional Pattern Information” (tables to describe the desired chip-select and addressing information). They look like this:
Chip Select Code (Check one square in each block)
CS1
PB6
CS2
PB5
Pull-up on PB7
YES
NO
ROM/RAM/I-O SELECTS (Specify H or L or N (don’t care) in each box.)
RS
CS1
CS2
A9
A8
A7
A6
ROM Select
N
N
N
N
RAM Select
I/O Select
As best as I can determine, the designers of the KIM-1 filled out the tables for the RRIOTs like so:
6530-002:
CS1
X
PB6
CS2
PB5
X
Pull-up on PB7
YES
NO
X
RS
CS1
CS2
A9
A8
A7
A6
ROM Select
L
H
N
N
N
N
N
RAM Select
H
L
N
H
H
H
H
I/O Select
H
L
N
H
H
L
H
6530-003:
CS1
X
PB6
CS2
PB5
X
Pull-up on PB7
YES
NO
X
RS
CS1
CS2
A9
A8
A7
A6
ROM Select
L
H
N
N
N
N
N
RAM Select
H
L
N
H
H
H
L
I/O Select
H
L
N
H
H
L
L
In a KIM-1, K5 is asserted low by addresses 1400-17FF. It is connected to the CS1 lines of both the 6530-002 and 6530-003. A9 and A8 need to be 1 for all I/O and RAM, and A6 and A7 determine which chip and I/O or RAM you get:
The RS lines are connected to different select lines, K6 for 6530-003 and K7 for 6530-002, this gives:
0001 10XX XXXX XXXX = 1800 – 1BFF = 6530-003 ROM (1k)
0001 11XX XXXX XXXX = 1C00 – 1FFF = 6530-002 ROM (1k)
All these values agree with the KIM-1 memory map documentation.
K0 $0000 – $03FF 1024 bytes of RAM (8*6102)
K1 $0400 – $07FF free
K2 $0800 – $0BFF free
K3 $0C00 – $0FFF free
K4 $1000 – $13FF free
K5 $1400 – $16FF free
$1700 – $173F I/O, timer of 6530-003
$1740 – $177F I/O, timer of 6530-002
$1780 – $17BF 64 bytes RAM of 6530-003
$17C0 – $17FF 64 bytes RAM of 6530-002
K6 $1800 – $1BFF 1024 bytes ROM of 6530-003
K7 $1C00 – $1FFF 1024 bytes ROM of 6530-002
I am a retired software engineer. I still program microcontrollers for fun. These days I concentrate on Microchip’s PIC chips, especially the PIC18 series chips. I retired from professional work at the end of 2010 and this year, 2016, I will turn 71 years old toward the end of the year.
Many years ago in 1971 at the ripe old age of 25, I bought a used DEC PDP-8/s minicomputer and played with it for many an hour. I even made a bit of extra money on the side by writing programs for that machine. (Yes, I still have the PDP-8/s.)
Early in 1975, a friend of mine bought a MITS Altair 8800 kit and invited me to help him build it. I was glad to help. That computer uses an Intel 8080 CPU chip. We soon had that machine blinking its lights and making strange noises in a nearby radio, but the fun seemed pretty limited for a little while.
Then a couple of college students named Bill Gates and Paul Allen wrote a BASIC interpreter for the Altair computer using the hitherto unknown company name of MicroSoft. My friend laid out the cash for the 4-kilobyte version of that product and we were soon writing BASIC programs for fun. Then my friend added an additional 4 kilobytes of RAM to his Altair and bought the 8-kilobyte version of MicroSoft BASIC. We spent many pleasant evenings in his basement writing BASIC programs for his machine. (By the way, my friend still has his Altair computer.)
In the era of the mid-1970s, microprocessor chips were still quite new but were becoming more known. The question on every would-be computer hobbyist’s lips was the same, “Which microprocessor chip is better, the Intel 8080 or the Motorola 6800?” I drooled over such things but, at more than a hundred dollars each, the cost surely seemed high for just a single silicon chip.
As I recall, some 8 guys who had been involved in the Motorola 6800 development left that company and joined MOS Technology, a calculator chip manufacturer, where about September of 1975 they created the very clever and much less expensive (about $25) MOS Technology 6502 CPU chip. Needless to say, my drooling intensified.
My TIM system got its start when my wife gave me, as a 1975 Christmas gift, just what I wanted most, a brand new MOS Technology 6502 microprocessor chip, a 6530-004 TIM chip, and 8 2102 static RAM chips. A 2102 RAM chip stores a whopping 1024 bits, organized as 1024 x 1. Those RAM chips ran so hot that you could not begin to touch them when they were operating.
I had a clear plastic box that I thought would make a nice enclosure for my TIM project. I took a large old printed circuit board and carefully stripped all the old parts and traces off of it to create a solid surface upon which to mount most of my circuitry, sort of a fiberglass chassis. I built up a simple 5-volt power supply to power the system consisting of a 120VAC to 12.6VAC transformer, a fuse, 4 1N2071 diodes wired as a full-wave bridge rectifier, a 2000 MFD 40 VDC filter capacitor, and a 7805 5-volt regulator. A long piece of aluminum running the length of the front side of the plastic box serves as the heat sink for the reguator. See Fig 1.
The CPU and the TIM chips were installed on a small perf board that was then glued with epoxy cement standing on edge on the large board inside the box. Additional components on this CPU/TIM board include a couple of 7400 quad 2-input NAND gate chips that I scraped up, about 9 resistors, a few small capacitors, and a couple of transistors that were involved in transmitting and receiving the 20-milliamp current loop signals for the Teletype. See Figs 2 and 3.
The 6502 supports several methods of being clocked. One uses a very simple external RC circuit so I chose that one. I included a potentiometer in the RC circuit so I could adjust the clock speed if needed. Since the TIM uses an autobaud feature to determine the timing for the serial interfaces, the clock speed needed only to be relatively constant but not any particular speed. See Figs 2 and 3.
I included a couple of red LEDs on the CPU/TIM board to reveal the state in the interface current loops with the Teletype, one for the sending side and one for the receiving side. (By the way, when I built this, we only had red colored LEDs. I had seen my very first LED in 1971, just 5 years earlier.) See Figs 2 and 3.
Aside from the CPU, TIM chip, and the RAM chips, most of the parts in this machine were salvaged parts scrounged from other old equipment and my spare parts box. The power transformer came from a nearby Radio Shack store. The IC sockets were wire wrap sockets that I unwrapped from old prototype boards being thrown out where I worked. However, I had no wire wrap tool so everything in the TIM system was soldered point-to-point.
Three push buttons were installed through the top of the plastic box for Reset, NMI, and IRQ. For the most part, only the Reset button was ever used. I may have used IRQ a few times. See Fig 4.
I made a little fan to keep the whole thing cool. The fan consisted of a small DC motor with a homemade aluminum fan blade on it. Eventually, I determined that the fan was just way to small for the amount of heat generated in this plastic box so I removed the fan and started using an external fan to cool it. All that remains of the old fan idea is the hole where it used to be located. See Fig 5.
As with many TIM systems, mine was connected to an ASR-33 Teletype unit. (Yes, I still have the Teletype, too.) Therefore, 10 bytes per second was the blazing speed for printing and for loading a program via 8-channel punched paper tape. I brought the serial lines out to a 37-pin connector on the side of the box. (Only slight overkill there… a 37-pin connector with only 4 electrical connections needed. One never knows when one will find a need for 33 spare pins.) See Fig 6.
I brought all the spare I/O port lines out to a connector on the side of the plastic enclosure so I could easily attach experimental interface circuitry there. See Fig 6.
To maximize cooling for the blistering hot RAM chips, I stood them on end, hoping for a degree of chimney effect cooling. They were all mounted in sockets as were all the chips of the project. Right from the beginning, I allowed room for an additional 24 2102 RAM chips so the system could grow from 1 kilobyte to 4 kilobytes of RAM. Standing the RAM chips on end resulted in one of the oddest physical wiring tricks in anybody’s computer and which is, no doubt, evident in the photos. Notice that much of the RAM array wiring was done with bare wire. For most of the wire in this project and especially the RAM array wiring, I used telephone wire which is to this day, one of my favorite kinds of hookup wire when solid wire is the best choice. It was easily stripped to make the bare wires for the RAM array. See Figs 7 and 8.
Aside from the ICs being in their sockets and a few connectors to the outside world, virtually every interconnection in this machine is hard wired with no connectors. It is obvious to me by looking at it now that I built the CPU/TIM board and then glued it down expecting to never have to change anything on it. (I do see that I tacked a capacitor onto the back of it at some point.) Looking at it now, I am surprised by some of the construction methods I used at that early time in my life (I was 30 years old). We all learn a lot as we grow older.
One kilobyte is a pretty small memory in which to store one’s program so I soon added the 24 additional 2102 RAM chips resulting in a total of 4 kilobytes of RAM. But that also made the little computer run really hot as well. So I added a slide switch to the system to choose whether it should run with 1 kilobyte or 4 kilobytes of RAM. That switch simply turns the power on or off to the extra RAM chips, thereby sometimes making life easier on the poor 7805 that was struggling to supply power to all those hot chips. See Fig 9.
There is a 74154 4-line to 16-line decoder that is involved in address decoding for the RAM chips (and for the EPROM chip described below). See Fig 10.
One reason for extending the RAM was that I found out about the existence of Tom Pittman’s Tiny Basic for the 6502 which cost a very reasonable $5 at the time. I loaded that little integer BASIC system and played with it often. Tom’s implementation is very compact and much could be accomplished even in a mere 4 kilobytes.
I wrote a number of assembly language programs as well. Clearly, the best one I ever wrote was a program to control a large set of Christmas lights that I strung across the front of my house. Each evening while I was on my way home from work, my wife would place a carefully prepared paper tape into the Teletype reader, turn on the power to the entire system, press the system Reset button, and turn on the Teletype reader. The tape contained a Carriage Return character to allow the TIM to determine the baud rate. After that came a TIM command telling it to load. Then came the machine code for the Christmas light program. When loading completed, one final TIM command on the tape started the program to running and the Christmas lights did their thing. It was always fun to arrive home and see my Christmas lights doing their dance before I even arrived. I used this little computer to run my Christmas lights so many times that it became clear that it would be smart to store the Christmas light program in an EPROM chip instead of loading it every evening from a paper tape. So I then added another slide switch inside the machine to optionally disable the TIM chip and enable a 2716 EPROM (2 kilobytes) plus a 7420 dual 4-input NAND gate chip (probably for address decoding) tucked into a corner of the box. When switched to the Christmas light position, one only had to power up the computer and press the Reset button to get the lights to go. By the way, there is no power switch other than plugging in or pulling out the power cord. See Figs 11 and 12.
The 7400 series chips are plastic and one 2102 chip is plastic. (I think I had to replace one of the original 2102 chips later because it had a habit of dropping bits, hence the plastic one.) Every other chip, including the 6502 and the 6530-004 TIM chip, are ceramic chips.
Looking over this little system after all these years, I have rediscovered many things about it that I had forgotten, most of which I have mentioned above. There is one more thing that I find of interest and that is the date codes. The 6502 CPU chip has a date code of 4775 meaning it was manufactured just about 4 weeks before I received it for Christmas. The 6530-004 TIM chip has a date code of 5075 meaning it must have still been a little bit warm when I got it as it had been made a mere week or so before it found its way under my Christmas tree. See Figs 13 and 14.
For those in the know, one might ask if my 6502 CPU chip includes the ROR (Rotate Right) instruction. Frankly, I can no longer remember if it does or not. I do remember the discussions about the issue of the earliest 6502 chips not having it.
In my boxes with electronic parts I have many IC’s. Partly new bought, lots also rescued from obsolete boards. The 65XX parts present a large part in the microprocessor corner! Recent inventory revealed some unique and older types. So here I present photos of unique 65XX IC’s in my collection, duplicates left out.
Some older ceramic IC’s are from photos from other sources, like the Jolt archive.
MOS Technology dated the IC’s with the number string WWYY, where WW is weeknumber padded with zero, and YY are the last two digits of the year.
Example is my oldest part is 6530, date 1476 white case, stamped week 14 year 1976. The youngest parts are Rockwell R6522s from 2007! And the 65c102 dates 0843, which means 2008?
Other manufacturers reversed week and year, like the 6507 8222, year 1982, week 22.
IC’s in this gallery:6501AQ,65(S)(C)02, 6503, 6504, 6507, 6510,R65F11, 6520, 65(C)22, 6524, 65266530, 65(SC)32, 6540, 65456550, 65(C)51, 6569, 6581, 65C102, 65802, 65816, 8501, CO14806 , CM630P
6501aq
6502
CM630P
Bulgarian unofficial clone, pin compatible
6503
6504
6507
6510, 8501 (6510 equivalent of later Commodore C64)
6520
6521
R65F11
6522
6524 I/O + timer
6526 (CIA, mostly found in Commodore systems)
6530
See the 6530 page for more information
(in my KIM-1)
(in my KIM-1)
A 6530-005 (TIM without ROM program) as sold on ebay, obviously rebranded since the SY6530-005 text is still visible. Hard to see, but the Synertek date code also seems not to be 8114.
A 6530 TIM recently acquired:
A mystery 6530, image from IC seller
Terminal Interface Monitor, short TIM, with codename 6530-004, is a 6530 with a monitor program in the mask ROM.
No systems were sold by MOS around it, just a kit with manual and the IC. The Jolts use a TIM IC, Micro Associates, who designed the jolts write the TOM monitor for MOS Technology and called TIM DEMON. The DATAC 1000, a single-board computer based upon a 6502 and a TIM RRIOT, designed in 1976 by Philadelphia Area Computer Society club members Carmen DiCamillo and Roland James.
Many hobbyists build themselves 6502 SBCs around a TIM IC.
Here the machine readable and ready to assemble source, listing and binary of TIM (Thanks Martin Hoffmann-Vetter) Note that this contains a corrected version! While testing the TIM Simulator I found an error in the papertape loader LH command, the ; start of a record seems to be OCR’ed to ‘:.
The story of the TIM (from Ch.1.5 of “On the Edge: the Spectacular Rise and Fall of Commodore”)
The first development system offered by MOS, the TIM IC, was in kit form, which reduced the selling price to only $30. Since the unit was designed primarily to instruct the user on the workings of computer systems in general and the 6502 in particular, MOS Technology contracted Microcomputer Associates of Santa Clara, California to write the unit’s internal program. The two founders, Ray Holt and Manny Lemas, taught engineers how to use microprocessors. Peddle relates, “You have to understand how little the world knew of microprocessors in 1974, ‘75 and ‘76. There were guys making big money selling classes on microprocessors during that time.” Manny Lemas had worked for Peddle during his GE days, while Ray Holt had an impressive background working on the F-14 Tomcat project for the Navy.
In the middle Manny Lemas, on the right Ray Holt
The technicians developed the system in a special research area on the second floor of MOS Technology. The lab was a room within a room, with a large sign on the door in capital letters warning NO ADMITANCE. Inside, the team stared intently at oscilloscopes or sat over hot irons soldering components onto circuit boards. Small pieces of circuitry were scattered chaotically across the room. Since the 6502 microprocessor and supporting chipset contained almost everything necessary for a computer, the design was minimal. When assembled, it could be connected to a teletype machine or a computer terminal.
The biggest job was programming the built-in ROM code for the computer. This consisted of a debugger and monitor program, appropriately called the Demon. According to Peddle, Demon was programmed by Manny Lemas and Mike Quarter, who previously developed Peddle’s time-sharing system. The programmers used this time-sharing system to develop the code, which they burned into a 6530-004 RRIOT chip. This little powerhouse included RAM, ROM , I/O and timer capabilities.
The system was named simply. Peddle and his team liked acronyms, thus the Terminal Interface Monitor, or TIM was christened. TIM would begin a predilection at MOS Technology and Commodore for assigning friendly three-letter names to their products.
Those ordering the $30 development kit received the grey-ceramic 6530-004 chip and a manual consisting of 14 sheets of 11×17 paper, folded and stapled in the middle. Included in the manual were a suggested schematic, the TIM monitor commands, a few sample programs and a listing of the monitor code. It was up to the user to provide the resistors, transistors, capacitors, wire, and even the 6502 microprocessor.
Though receiving a computer in the form of a kit does not seem particularly user friendly now, hobbyists at the time clamored to build their own computer. Nonetheless, a good portion of the kits failed to operate upon completion. Rather than using a prepared circuit board, many buyers simply wire-wrapped the chips together on a piece of generic perf board or prototyping board, often termed a kludge board. After placing the required components on the board, builders hand wired the chips one pin at a time, resulting in a snarl of fine multicolored wires. Once the chips were in place, the user then had to construct or purchase a separate power supply for the TIM. Finally, the TIM was (as the name suggests) able to interface with a standard ASCII terminal or teletype machine.
As hoped, the do-it-yourself nature of the kits spawned familiarity with the products, and once hobbyists had invested time learning about the chip, they often remained loyal to the 6502. Many hobbyists ended up using their TIM computer as a small development system, since it was ideal for creating small programs. For their part, MOS Technology continued to sell TIM computer kits to diehard hackers, even after the Commodore acquisition. Ultimately, TIM was just a stepping-stone to developing and marketing a fully assembled computer.
Functions of the TIM software in ROM
• Self adapting to any terminal speed from 10-30 cps,
• Display and Alter CPU registers,
• Display and Alter Memory locations,
• Read and Write/Punch hexadecimal formatted data,
• Write/Punch BNPF format data for PROM programmers,
• Unlimited breakpoint capability,
• Separate non-maskable interrupt entry and identification,
• External device interrupts directable to any user location or defaulted to DEMON recognition,
• Capability to begin or resume execution at any location in memory,
• Completely protected, resident in Read Only Memory,
• Capability to bypass DEMON entirely to permit full user program
control over system,
• High speed 8-bit parallel input option, and
• User callable I/O subroutines.
DEMON’s Command Set Includes:
.R Display registers (PC,F,A,X,Y,SP)
.M ADDR Display memory (8 bytes beginning at ADDR)
: DATA Alters previously displayed item
.LH Load hexadecimal tape (socalled MOS papertape format)
.WB ADDR1 ADDR2 Write BNPF tape (from ADDR1 to ADDR2) (Intel papertape format)
.WH ADDR1 ADDR2 Write hexadecimal tape (from ADDR1 to ADDR2)
.G Go, continue execution from current PC address
.H Toggles high-speed-reader option (if it is on, turns it off; if off, turns on)
I know of several commercial systems using the TIM:
– The Jolt and Superjolt, Microcomputer Associates/Synertek (also information on the origin of the TIM-1 program!)
– the first Brutech BEM bus system, A small dutch company, Vinkeveen, that produced professional 6502/6809 and more, industrial systems.
– Datac 1000
Frank Wolf has decapped a TIM 6530-004 to study it and maybe do a FPGA clone.
Here the photo’s:
Expand your TIM
TIM BYTES THE APPLE
(Design by Fred Hatfield, scans and transcription by Tom Owad, https://www.applefritter.com/node/2833)
For those of you that would like to have hard copy capability and much better control over program development on the Apple 1, the following hardware addition will accomplish it.
Using a 6530-004 (‘TIM’ chip) costing about $12.00 gives many superb features such as a variable baud rate serial input/output, a high speed parallel input (high speed paper tape reader), an excellent breakpoint processor, paper tape dump and load routines, etc.
The TTY port is located at locations 6202H and 6203H. Date at that port should be 00H and 16H respectively. The baud rate is stored at 00EAH and 00EBH and 110 baud is represented by 10H and 46H at those locations. It’s a fun addition to the Apple 1. Try it!
Fred Hatfield K8VDU
Teletype connection schematic.
Teletype Pinouts (connections 6530-004 and Apple bus):
TIM articles in the Micro journal in pdf format:
– Micro 1: Terminal Interface monitor (TIM), introduction and description, with am alternative system circuit diagram.
– Micro 3: TIM meets the S100 bus.
– Micro 9: Two short TIM programs. First a program to chage the baudrate, the second is a small operating system.
