Super Jolt

The Super Jolt is a evolution of the JOLT. Same CPU, 1 MHz clock, same TIM IC, same PIA, more RAM (1K), sockets for PROMS, RAP (Resident Assembler Program) and Tiny Basic (of Tom Pittman Itty Bitty Computers) in ROM.
Sold under the name CP110 by Synertek in 1985, Microcomputer Associates had become the core of Synertek Systems and in the next years produced the SYM SBC’s.

I have acquired 3 Superjolts! Synertek branded, 1978 TIM.

Downloads

	Superjolt CP110 User Manual Also Tiny Basic, RAP userguide
	Superjolt CP110 Synertek
	Cross assembler Manual, GE timeshare, as reference for the Resident Assembler program
	DEMON software manual (this manual has an alternative listing of the TIM 6530-004 monitor)
	2K PROM hardware_manual

Software

The DEMON ROM is the same as 6530-004 TIM ROM.

Tiny Basic and Resident Assembler Program are supplied in two 2K EPROMs. With straps the Superjolt could use the 9216 ROM. With some smart patching (see below), the more usual 2716 EPROM can be used.
Here the dumps of the two EPROMS on my Superjolt system. Some of Tiny Basic is in he second EPROM!

Also have a look at the Tiny Basic page, where much is told about Tiny BASic, and for the TIM/Superjolt patched versions and assembler source.

Jumpers

The Superjolt has a number of jumpers, explained in the manual page 3-5 and 3-6.

The schematic and photos below below shows on the right the patch to support 2716 EPROMs.

2K EPROM schematics

2K PROM PCB

Gallery

Photos of my Superjolts

Photos by Ray Holt of Microcomputer Associates.

PAL-2

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Jolt

Jolt was the first 6502 singleboard computer. On December 1975, the coveted inside-front-cover of Byte magazine contained a two-page advertisement for “the world’s lowest cost computer system”. This was perhaps the first non-MOS Technology 6502 based computer system to come to market, The computer was named Jolt, and it was marketed by Microcomputer Associates Inc. (MAI) as both a kit for $249, or fully assembled and tested for $348 (Dec. 1975 Byte). Microcomputer Associates also sold add-ons for the basic system. They included 4 kilobytes for $265, an I/O card for $96, and a power supply for $145. Either at that time or shortly later MAI expanded the line to a RAM card and an EPROM card using 2702 PROMS. The boards were about 4″x6″ arranged in a vertical stack jointed by a ribbon cable. Only 5 volt power was needed. Software available in PROM was RAP (Resident Assembler Program) and Tiny Basic from Tom Pittman.

As can be seen in the photos of the Jolt front, back and experimenters card below, the system is quite simple. In fact it is a TIM system (the 6530-004 is the middle IC), with a 6502 at the right and a 6820 PIA on the right. Some glue logic on the right and the top, RAM on the bottom (4x 2111 for 512 byte memory) and RS232 TTY interface at the right (1488, 1489 line drivers). The system clock was a RC at 750 KHz, in the photo the clock is a 1 MHz crystal added later.
The TIM IC, 6530-004,contains the ROM (1K), timers, 128 byte RAM, 16 I/O) and 64 bytes RAM. The PIA 6820 adds another 16 bit I/O.

JOLT SPECIFICATIONS SUMMARY

(See the Microcomputer Associates Catalog in PDF format here)
• MOS Technology 6502 CPU
• MOS Technology 6530 with DEbug MONitor (a 653-004 TIM)
• 750 KHz clock operation-RC controlled or crystal controlled with user supplied crystal.
• 512 bytes RAM
• 64 bytes RAM-located at interrupt vector locations
• Expandable address & data lines
• Direct drive to 8 K bytes of memory
• 26 Programmable I/O lines
• Two hardware interrupts
• Serial interface for 20 ma current loop and EIA RS232C
• 4.25″ x 7″ printed circuit card
• Compatible with other JOLT cards

Jolt User Newsletter

JOLT SYSTEM DESCRIPTION

The JOLT system consists of a set of modular microcomputer boards which can be used singly or tied together to produce any desired microcomputer system configuration. The minimum system is one CPU board. which alone constitutes a viable computer system complete with central processor. 1/0. interrupts. timer. read/write memory. and a complete software debug monitor in read-only memory. Additional boards in the JOLT system include a 4 K byte RAM , 1/0. Power Supply and blank Universal Interface board. A large JOLT system could have up to 32 K bytes of RAM memory. up to 128 lines of bidirectional 110 and 16 interrupts. JOLT boards come in kit form or assembled. and are ready to use in any form. from home hobby kits to industrial applications. All JOLT components are new. fully tested and fully warranted by MAI.

CPU
The internal oscillator operates in a “free run” mode with a capacitor and variable resistor supplied on the CPU printed circuit board. The frequency of oscillation may be adjusted with the variable resistor. If a very stable clock is required by the system a crystal may be added to the CPU board.
The RESET input to the CPU is pulled to logic ground by an RC circuit (t=33 milliseconds) on the printed circuit board. The CPU normally fetches a new program count vector from hex locations FFFC and FFFD upon activation of the RESET line, but these locations are in the interrupt vector RAM and therefore volatile. Hardware on the CPU board causes the CPU to begin executing the monitor program by forcing the effective sixteenth bit of the address bus to a logic ZERO during reset. As a result, the RESET function on the JOLT CPU card causes the debug monitor (DEMON) to begin executing.
There are two interrupt inputs to the CPU. One interrupt is maskable under program control (IRQ) and the other (NMI) is not.
A READY control line provides for asynchronous operation with slow memory or I/O devices.
The address bus (A0-A15). the data bus (00-07). the two phase clock (PHI). the reset line (RESET). the interrupt lines (IRQ and NMI). and the ready line (RDY) are all available at the edge connector of the CPU board. The loading restrictions should be considered when using the signal lines driven by the CPU for external system expansion.

Program RAM
There are 512 bytes of program RAM provided on the CPU card. The program RAM is hardwired addressed as the first 512 bytes of the CPU’s 64 K of memory address space. It may become necessary to remove these RAM’s from their sockets if a 4 K memory card is also hardwired in this address space. The program RAM on the CPU card uses NMOS RAM chips type 2111, 512×4 bytes.

Monitor ROM and Interrupt Vector RAM
The monitor ROM is located in the last 1 K bytes of the lower half of memory space (first 32 K bytes). The interrupt vector RAM is located in the last 64 bytes of the 64 K memory address space. The monitor ROM and the interrupt vector RAM as well as additional I/0 are implemented with a single 6530 chip, the 6530-004 TIM

Programmable User I/0
The programmable I/0 lines available from the CPU card are provided by a Peripheral Interface Adapter (PIA) and a 6530 ROM chip. The PIA has two 8-bit 1/0 ports with two interrupt-causing control lines each. Two jumpers are provided on the card which connects one or both PIA interrupt outputs to the CPU IRQ interrupt line. Refer to the CPU assembly drawing for proper identification of the jumpers. A Data Direction Register for each port determines whether each 1/0 line is an input or an output. The 6530 ROM chip provides 10 additional I/O lines that may also be specified as input or output lines under program control. There are eight 1/0 lines from one port on the 6530 and two 1/0 lines from the second port. These I/0 lines may be used in conjunction with DEMON for interfacing a high speed paper tape reader to the CPU card. In the paper tape reader application, the eight 1/0 lines from one port are used as inputs and two I/0 lines from the second port are used to accomplish the handshake control between the reader and the CPU card.
The PIA is hardwired addressed as location 4000 to 4003 in the memory address space. Memory addresses from 4000 to 4003 are allocated for PIA devices so that the JOLT system may be easily expanded to accommodate up to eight PIA chips. The 6530 uses addresses from 6200 to 6E07 for eight I/0 functions. The unused memory addresses occur because address bits A10 and A11 are ignored to simplify address decoding. The 6530 I/0 lines may be referred to as Monitor I/0 because these lines are commonly used for a high speed paper tape interface.
See the TIM page for more information on timers and I/O.

Standard Interface Circuits
The JOLT CPU card provides direct interfacing with a 20 mA current loop and RS232C terminal. The 20 mA current loop requires +5 v and -10 v whereas the RS232C interface requires +12 v and -10 v. Both interfaces are wired in parallel on the input and output thereby allowing both interfaces to be used simultaneously.

JOLT SYSTEM MEMORY MAP
The memory map on the following charts explains what functions have been assigned to each segment of the JOLT address space. It is recommended that users respect this space allocation when adding memory and peripherals to their JOLT systems. Space has been reserved for 32 K bytes of user RAM or ROM, seven additional PIA devices, and’up to 512 user I/O device registers. Other areas are reserved for JOLT expansion, new JOLT peripherals and memory options will use these spaces. Users are advised to not use JOLT expansion space unless absolutely necessary. Note that some areas used by the JOLT CPU board and PIA boards have more space indicated than there are registers or locations in the device occupying them. This is because these devices do not decode all address bits, or use some of the address bits for special functions. For example, the 6530 timer determines the time scale and interrupt enable/disable by the address used to access it. Thus, these “partly filled” areas are actually entirely used and are not available for other uses.

(1) Standard on JOLT CPU board.
(2) Available to user-not used by DEMON.
(3) To get enable-interrupt address, add 0008 to disable-interrupt address with corresponding functions.
(4) Reserved for DEMON use, TTY control and reset functions

DEbug MONitor (TIM 6530-004)

Debug Monitor
The JOLT CPU card comes complete with DEMON, MAl’s debug monitor program. The program is located in the 1,024 byte, Read Only Memory (ROM) of the multi-function 6530 chip and is therefore
completely protected against any alteration. DEMON provides a permanently available general purpose monitor program to aid users in developing hardware and software for MAl’s JOLT series of microcomputers.
DEMON’s Features Include:
• Self adapting to any terminal speed from 10-30 cps,
• Display and Alter CPU registers,
• Display and Alter Memory locations,
• Read and Write/Punch hexadecimal formatted data,
• Write/Punch BNPF format data for PROM programmers,
• Unlimited breakpoint capability,
• Separate non-maskable interrupt entry and identification,
• External device interrupts directable to any user location or defaulted to DEMON recognition,
• Capability to begin or resume execution at any location in memory,
• Completely protected, resident in Read Only Memory,
• Capability to bypass DEMON entirely to permit full user program
control over system,
• High speed 8-bit parallel input option, and
• User callable I/O subroutines.
DEMON’s Command Set Includes:
.R Display registers (PC,F,A,X,Y,SP)
.M ADDR Display memory (8 bytes beginning at ADDR)
: DATA Alters previously displayed item
.LH Load hexadecimal tape
.WB ADDR1 ADDR2 Write BNPF tape (from ADDR1 to ADDR2)
.WH ADDR1 ADDR2 Write hexidecimal tape (from ADDR1 to ADDR2)
.G Go, continue execution from current PC address
.H Toggles high-speed-reader option (if it is on, turns it off; if off, turns on)
See the TIM manual for more information on DEMON, the name MAI uses for the TIM program.

RAP — 1.75K Byte Resident Assembler Program
(This looks like a predecessor of the RAE of the SYM-1). The JOLT Resident Assembler Program (RAP) is designed for use on JOLT systems equipped with at least 4K bytes of RAM memory. RAP has some significant advantages over conventional assemblers:
1. Resident as part of the JOLT system on PROM chips. The assembler never has to be read into volatile memory before use. It, just like the DEMON monitor, is instantly available. In addition, costly time sharing services are not needed for cross assemblies.
2. Operates on one pass of the source code. The source tape is read in only once, thereby increasing assembler speed by a factor of two over conventional assemblers that make two or three passes over the source code.
3. Small in size. The assembler is smaller by a factor of 4 or 5 over comparable assemblers. Its size guarantees the smallest number of PROM chips needed and minimizes printed circuit board space requirements. With the assembler PROM chips installed in your JOLT PROM board (at address E800 hex), the assembler may be activated by reading the source code input on the console input device and transfering to location E800 hex using the DEMON monitor. As source code is being read in, a listing is produced on the console printer and the object code is generated directly into RAM at the addresses specified by the origin directive (.ORG).
After the assembly is complete, the object code may be punched onto paper tape or executed directly using DEMON. The assembler assumes RAM at locations 1FFF hex and lower to be available for symbol table usage. RAP uses an efficient symbol table algorithm and users can normally expect that about 4 to 6 bytes of RAM will be used for each symbol or that a 3000 byte program would use approximately 800 bytes for the entire symbol table (locations 1CEO to 1FFF hex). This space need not be left unused if buffers,’ etc. are allocated to it. The Resident Assembler Program is compatible with the MAS Technology Cross Assembler with the following exceptions:
1. Expressions and * (used for current program counter) are not allowed.
2. Thee .OPT and .PAGE pseudo operations are not implemented.
3. Octal and binary numbers are not implemented.
4. .ORG is used instead of *= to origin program.
5. .RES is used for reserving storage.

The Jolt is somewhat famous for the part it played in the development of the prototype Atari 2600 VCS, which was assembled using the Jolt computer board.

This photo is one of the original wirewrapped prototypes for “The Worlds Most Popular Video Game” aka… The Atari Video Computer System (VCS) Model #2600. The interesting and eye catching part of the unit besides the extremely intricate hand wired area (TIA perhaps?) are the controllers, you look and say “Hey those don’t look like the standard CX-40 joysticks I’ve come to know and love all these many years!” The controllers are actually from the Atari/KeeGames TANK coin-op arcade game. The actual Atari VCS joysticks would later come from a home console game of TANK which was sold under the Sears exclusive brand label. The Atari Tank joysticks for a one player would act as left and right treads on the home tank game and then they popped out of the rectangular home console and could be used for two player action and would allow each user to use one joystick just like Atari VCS Combat (CX-2601).

The above prototype designed by Ron Milner and Steve Mayer in Grass Valley, Ca. at Cyan Engineering (a company owned by Atari, Inc.)is actually a combination of many parts. The wirewrap board was the original version of the STELLA chip. The boards to the right are a memory board and a “Jolt” 6502 board ) and on the far left is a 5V power supply. The above Stella prototype had actually been thrown out in the garbage at Atari at one point. Owen Rubin, one of Atari’s first programmers had found it in the trash and recovered this piece of history and placed it into the safe hands of Atari’s Employee #3, who built the first Atari Pong, Allan Alcorn.

History of Jolt Serial One, Bill Ragsdale (from http://www.old-computers.com/)

Jolt was designed and developed by Raymond M. Holt, Founder and Executive Vice-President of Microcomputer Associates. Holt went on to design the SYM-1 single-board computer, a KIM-1 clone. In the late 1990’s Holt was finally given government permission to discuss his role in the development of the F-14 Tomcat. Holt claims he designed and developed the worlds first microprocessor one year before Intel.
Manny Lemas was the co-founder of Microcomputer Associates, Inc. Ray Holt was the hardware side and he was the software side of the business. He wrote the DEMON (Debugger/Monitor) software for the JOLT.
This software was actually developed for MOS Technology for use in the TIM chip and the KIM-1 single board computer. M.A. was granted rights to its own version of the software for use in the JOLT, they used the TIM 6530-004 IC!

I bought the first Jolt microcomputer out the door. I saw its advertisement (in Byte?) and was just starting a project in security access control. We were doing a crash project to demonstrate reading magnetic striped ID badges for Honeywell. We needed to accept a real-time bit sequence, extract numeric data and do a simple name vs. number lookup. An ideal job for a small processor. But remember, this was 1976. Development systems cost $5,000+ and none were offered for the 6502. (Later, MOS Technology offered one and Rockwell had a very good one.)
I ordered a Jolt system on a Wednesday or Thursday and was told Microcomputer Associates Inc. (Manny Lemas and Ray Holt) was awaiting the first silicon of their DeMon monitor to come by air from MOS Technology in two days, on Saturday. DeMon was a one chip Debug-Monitor containing 1K of ROM, 512 bytes of RAM, paralled IO, an ASCII serial interface and a monitor program. With the 6502 processor and a simple clock you could have a two-chip microcomputer. DeMon was later renamed Tim, Terminal Input Monitor.
MAI received their first DeMon chips about 9 AM Saturday morning, plugged in one, it ran, and I picked up the first unit at noon at their office. IIRC the Jolt had an inked-in serial number 0 or 1. Over the week-end I built a teletype interface as Jolt had a voltage output while the Teletype had current loop.

Gallery

Photos by Ray Holt of Microcomputer Associates.

PAL-2

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TIM-2 a ‘modern’ recreation of a TIM-1 system

Posted on 13/01/2020 by hanso

Peter Renaud has designed a TIM system with a 6532, a 6502, some RAM, ROM and glue logic that runs the TIM ROM software.

Read here for the circuit diagram and assembler source.

Focal-65 V3D for TIM and KIM-1

Focal on the 6502, a page on this small language, originating for Digital Equipment. A small interpreter (about 5K) for...

John Bell Engineering catalogs

Thanks to Dallas Shell I have added the 1984 and 1988 catalog to the John Bell Engineering pages. Also a hand drawn and...

New KIM-1 info and more

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KIM-1 Simulator simple demo

To test my new HDMI 4K USB Video Capture I made two videos. Simulator running on one notebook, the other notebook with t...

TIM-2

The TIM-1 IC is a 6530, and since the 6532 is nearly identical with regards to I/O and timer facilities it is possible to construct a TIM system with the same software.

And that is what Peter Renaud has done. He took a 6532, a 6502, an EPROM (as replacement for the mask ROM in the 6530-004) and some RAM, some glue logic to build a system. See the cicuit diagram and source below (reproduced here with his permission).

Schematic in PDF format

TIM-2 assembler source (updated 2023)
Adapted for other I/O RAM and ROM addresses, functionally identical to the TIM ROM source.
Changes are (besides some assembler related)
– I/O base TIM = $6E00 TIM-2 = $6800
– ROM start TIM = $7000 TIM-2 $F000
– 64 Byte monitor reserve area TIM $FFC0 TIM-2 = $6000
– TIM-2 no INT Vectors area
– RS232 bit inverted
– 7 bit ASCII forced

An older version of the TIM-2 on the test bench of Peter.

PAL-2

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Part 4 Sorbus runs Wozmon, Apple 1 Basic, MCP

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Sorbus computer part 3: the hardware

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Sorbus computer (part 2)

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PC utilities KIM Simulator Convert hex etc

To aid in the handling of KIM-1 program and dataformats I have written some programs for Windows and Linux (Raspberry Pi), sources included.

Convert 8 bit hex formats
KIM-1 simulator
Pascal-M cross compiler
KIM Tape WAV to BIN conversion
KIM Tape Convert BIN and BIN to WAV
KIMPaper
KIMPoser Tape Convert hex to WAV online

All programs come with source (Free Pascal Lazarus), compiled for Windows but thanks to Freepascal and Lazarus also compiled and tested on Linux (Ubuntu and Raspberry PI OS).

Convert 8 bit hex formats

A general purpose utility to convert common 8 bit hex and binary formats, such as Intel HEX, Motorola S records, MOS Papertape, hex format, and binary files.
Version 2.9, June 2024. Define assembler output and bugfix MOS papertape format, PRG Commodore file format, TIM papertape format

Convert8bithexformat source files (Freepascal Lazarus).
Convert8bithexformat Setup for Windows, Executables for Ubuntu and Raspberry PI OS
Available formats:
– BIN binary, raw data, no formatting, no information on start address.
– HEX formatted as hex numbers raw data, no start address included.
– IHEX Intel hex 8 bit format, multiple memory block, start address included.
– PAP MOS Technology papertape format, multiple memory blocks, start address included.
– SREC Motorola 8 bit S record, contiguous memory block, start address included.
– A1hex Apple Woz monitor hex format, start address included.
– KIM Tape as used in the KIM-1 Simulator as emulation of audio tape files.
– assembler formatted bytes as .byte or your prefix text
– PRG files (binary with start address)
– TIM papertape format (MOS Papertape with simple end record)

KIM-1 Simulator

6502/65C02 CPU emulation, disassembler, TTY, KIM-1 keypad and LEDs.

See the KIM-1 Simulator page for more information.

KIM Paper

Note that the Conver8bitHexFormat program is also capable of converting to and from Papertape format from many more formats.
Originally written for the launch of the MicroKIM, an older version is on the support CD.

When you attach a serial device like the teletype or a modern PC with Hyperterminal you can use the KIM monitor of the KIM-1. One of the functions is loading from and saving to a papertape device on the teletype. Now since this is a way to load and save data as a textfile this is in fact quite useful.
The Micro-KIM triggered me to modernize my conversion utility for MOS Technology papertape format dating from 1983, VAX/VMS and Turbo Pascal. A Windows and a commandline/console version are available.

KIMPAPER for Windows

A program for Windows to convert between papertape and binary format.

Windows setup KIMPAPER
Sources (Freepascal Lazarus, build also on Linux)

KIMPAPER V1.1 for DOS

Not too modern, but handy, a commandline utility. Does exactly the same as the Windows program KIMPAPER. Runs fine in a commandline DOS box. Can also be compiled for Linux with Freepascal. In the KIMPAPER DOS archive the program, source and information on the program and papertape format can be found.

C:\MICROKIM\kimpaper
KIM-1 MOS Technology BIN papertape format conversion utility, Hans Otten, 2007 v1.1

Syntax is:
KIMPAPER [-[b|p] filename [startaddress]
C:\MICROKIM\kimpaper -h
KIM-1 Mos Technology BIN papertape format conversion utility, Hans Otten, 2007 v1.1
Syntax is: KIMPAPER [-[b|p|h] filename [startaddress] first parameter switches
-h help
-p convert to papertape
-b convert to binary
second parameter (first if no parameters, assumed binary to papertape)
name of file to convert
.BIN for binary, forces conversion to PAPertape
.PAP for papertape, forces conversion to BINary
third parameter (assumed 0000 if not present)
startaddress for BIN to papertape conversion
Files of type .BIN wil force conversion to papertape.PAP
Files of type .PAP wil force conversion to binary .BIN

Examples:
C:\MICROKIM\kimpaper mastermind.bin 0200
KIM-1 Mos Technology BIN papertape format conversion utility, Hans Otten, 2007 v1.1
C:\MICROKIM&amp;amp;amp;gt;kimpaper mastermind.pap
KIM-1 Mos Technology BIN papertape format conversion utility, Hans Otten, 2007 v1.1
Start address 0200 in file mastermind.BIN

Convert KIM tape to text

KIM Tape to Text is a utility to convert between binary format of a KIM-1 tape dump to a DOS text file.
The KIM tape dump is a binary file and is just a dump of part of the memory of the KIM-1.
This binary file can be a text file as used in editors Micro Ade or CW Assm/TED.
By using the tape write routine in the KIM-1 one can write an audio file on cassette.
When this audio file is captured on a PC as WAV file (22K, mono) this can be converted back to a binary memory dump with ED’s Utility KIMTape
These text files can be converted to DOS text files with this utility.

First open the binary file. If this is recognized as Micro Ade or CW Moser format, the Save as text file can be used.

Windows program.
Full source for Freepascal and Lazarus , no Windows dependencies. Compiled on 64 bits Windows 10 as 32 bit application.

Note on detection of assembler editor type
1. Micro Ade file must start with CR: when present this is Micro Ade
line nr follows 2 byte
line ends with $0D
file ends with $40
2. Assm/Ted by CW Moser starts with line number $10 $00
end of line is high bit set
There may be rare situations that a file starts with a $0D or a different line nr. You can force CW Mose detection by changing this to a sequence of $10 $00 $0D and if necessary blanks $20 to make it consistent. If in doubts: use an editor that shows the file in hex (Ultra Edit, or the free Notepad ++, Text editor PRO) and study the tape file.

Methods to get the binary file out of a Junior or KIM-1.
Read the record tape into a binary with Ed’s KIMTAPE conversion *see below). It is MS-DOS and runs fine in VDOS (https://www.vdos.info/) or DOsbox (slow).
Make a note of start address as shown by KIMTAPE.
Non-printing ASCII characters are filtered out of the resulting text file.

KIM Tape Convert WAV to BIN and BIN to WAV

Not my program, but so handy!

KIMTAPE v0.5 – tape conversion utility for KIM-1 and SYM-1 (2004-05-17) Local copy of http://dxforth.mirrors.minimaltype.com/#kimtape)

KIMTAPE allows programs stored on cassette tape to be decoded to a program file. It handles both MOS Technology KIM-1 and Synertek SYM-1 tape formats including HYPERTAPE. The reverse process – converting a program file to an audio wavefile is also possible, allowing one to produce perfectly regenerated cassettes. KIMTAPE works with 8-bit mono WAV, VOC or RAW audio files recorded
at 22050 samples per second.

Download: kimtap05.zip (MS-DOS) It is MS-DOS and runs fine in VDOS (https://www.vdos.info/) or DOSbox (slow).

The binary files in the KIM-1 program archives have been reproduced, from the original cassette recordings, with the tool KIMTAPE on a PC in a DOS box. See Eds DX-Forth and Utilities Page for this and other nice programs.
This program also makes it possible to reproduce the original cassette recordings that can be read by a KIM-1.

The files were made as follows: The KIM-1 cassette audio was connected to the PC audio input and (with e.g. Audacity) recorded as a wave file (mono 22KHz).
For example: qchess.wav
The wave file was then converted with KIMTAPE to a binary file (the exact content of of the KIM-1 memory when recorded).
And the KIMTAPE utility then displays load address (for example and tape ID

c:\kimtape qchess.wav qchess.bin
KIMTAPE version 0.5 17-May-04
infile: qchess.wav
outfile: qchess.BIN
Program 01 address 0200 checksum OK xxxx bytes done

This .bin file (any extension is fine!) is NOT a wave file! It contains the exact content of the KIM-1 memory when recorded. The size is exactly the number of bytes as stored in the memory of the KIM-1 and much smaller than the wave file. This binary file can be converted back to a wave file with KIMTAPE or converted to a papertape file with KIMPAPER:

C:\kimtape -M -A0200 -D01 -B2 qchess.bin qchess.wav

As you can see: you have to specify the load address and the program ID. The B parameter indicates hypertape speed (2 here, slow)
The resulting wav file should be acceptable for the KIM-1. It is (as I have tested) acceptable as input for KIMTAPE!

All command parameters can be seen by typing KIMTAPE without parameters:

Pascal-M Cross compiler

Executables of cross compiler, workflow, sources, command line utilities.

PAL-2

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Part 4 Sorbus runs Wozmon, Apple 1 Basic, MCP

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Sorbus computer part 3: the hardware

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Sorbus computer (part 2)

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Jolt and Super Jolt

On these pages some information on the Jolt and Super Jolt and Microcomputer Associates.
Microcomputer Associates company played an important role in the 6502 SBCs, TIM, KIM-1 and SYM-1 all contain results of their work.
The company continued as Synertek Systems with the Superjolt, SYM-1 and more.

One of the first 6502 systems was the Jolt. Built around the 6502 and the TIM 6530-004 RRIOT. The TIM software is developed by Micro Associates for MOS Technology.
The Jolt was superceded by the Superjolt, Micro Associates became Synertek Systems.

Read about the systems and Micro Associates:

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6530 TIM IC

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New in my collection: a TIM IC! 6530-004 2577

Focal-65 V3D for TIM and KIM-1

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New commands for TIM

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An article from Micro February 1979 shows how to enhance the TIM monitor.

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KIM 6530 to 6532

Replace the 6530-002 and -003 in a KIM-1: a KIM-1 clone.

The base for all ‘modern’ KIM clones, KIM reproductions, MICRO KIM, PAL-1 and more.

Credits to Ruud Baltissen for the idea and details. ‘I’ means Ruud in this page!

RRIOTs are mask programmed for address selection, choices are:

Pin 18 PB6 or CS1
Pin 19 PB5 or CS2
Pin 17 PB7 can have a pullup
ROM selection on RS0, CS1 und CS2 s
RAM on RS0, CS1, CS2, A9, A8, A7 and A6
I/O on RS0, CS1, CS2, A9, A8, A7 and A6
See the various 6530/6532 datasheets for (some) more detail.

The troublemaker: 6530, detailed background information

The KIM-1 has two 6530s on board. For more info about this IC, please read the datasheet. Anybody who is a little bit familiar with the hardware market can tell you that you cannot buy the 6530 anymore. Happily enough there is another IC available which you could call its brother: the 6532. The 6532 has 16 I/O-lines, an internal timer and 128 bytes of RAM on board, but no ROM. The internal ROM of the 6530 can be selected independently from the I/O. So for this project we’ll use an external EPROM as replacement. The pin out of the 6532 is completely different but that should not be a problem.

The next difference is the fact that the 6532 has a separate IRQ and PB7 line. As we will see, the functionality of both lines is the same as with the 6530. To create the same circumstances we only have to connect them together.

The third difference is the availability of PB6 with a 6532. See it as a bonus as I haven’t found any reason how it could jeopardize our project.
The fourth difference is that it is possible to generate an interrupt depending on the behaviour of PA7. But this is an option, which is out of function by default after a reset.

The last and major difference however lays in the way the registers are selected:

function:       RS:  A6:  A5:  A4:  A3:  A2:  A1:  A0:  R/W: 
                                                            
RAM              0    x    x    x    x    x    x    x    x   
                                                            
DRA              1    x    x    x    x    0    0    0    x     A
DDRA             1    x    x    x    x    0    0    1    x     B
DRB              1    x    x    x    x    0    1    0    x     C
DDRB             1    x    x    x    x    0    1    1    x     D
                                                            
PA7, IRQ off,                                               
      neg edge   1    x    x    0    x    1    0    0    0     F
PA7, IRQ off,                                               
      pos edge   1    x    x    0    x    1    0    1    0     G
PA7, IRQ on,                                                
      neg edge   1    x    x    0    x    1    1    0    0     H
PA7, IRQ on,                                                
      pos edge   1    x    x    0    x    1    1    1    0     I
                                                            
read interrupt                                              
       flag      1    x    x    x    x    1    x    1    1     E
                                                            
read timer,                                                 
       IRQ off   1    x    x    x    0    1    x    0    1     J
read timer,                                                 
       IRQ on    1    x    x    x    1    1    x    0    1     K
                                                            
Clock / 1,                                                  
       IRQ off   1    x    x    1    0    1    0    0    0     L
Clock / 8,                                                  
       IRQ off   1    x    x    1    0    1    0    1    0     M
Clock / 64,                                                 
       IRQ off   1    x    x    1    0    1    1    0    0     N
Clock / 1024,                                               
       IRQ off   1    x    x    1    0    1    1    1    0     O
                                                            
Clock / 1,                                                  
       IRQ on    1    x    x    1    1    1    0    0    0     P
Clock / 8,                                                  
       IRQ on    1    x    x    1    1    1    0    1    0     R
Clock / 64,                                                 
       IRQ on    1    x    x    1    1    1    1    0    0     S
Clock / 1024,                                               
       IRQ on    1    x    x    1    1    1    1    1    0     T

In total 5 address lines are used, meaning 32 registers. 
But 11 of the 19 registers have one or more mirrors.
Read:        J E J E       K E K E       J E J E       K E K E 
Write:       F G H I       F G H I       L M N O       P R S T 
R/W:         A B C D       A B C D       A B C D       A B C D

As we can see, the last 16 registers equal the 16 of the 6530 itself.
So now we have to develop some logic which will do the following:

The 6532 is only visible within a range of 128 bytes
The first 16 bytes represent register 16 to 31
The next 48 bytes are mirrors of the first 16
The last 64 bytes appear as RAM

Conclusion:

Input A6 won’t be used and can be tied to GND
Input A4 is connected to address line A4 of the 6502 via an inverter.
A 74LS138/74LS08 construction or equivalent enables the RS- and CS-lines at the right moment.

ROM and RAM

Here we have a luxury problem. We only need 2K of (EP)ROM like the 2716. The problem is that the 2716 is hard to find and more expansive then the 2764 or its bigger brothers. When we use a bigger EPROM we only have to tie the unused address lines to GND. The same problem occurs with the RAM.

If we have to use bigger RAMs or EPROMs anyway, it is quite easy to use other parts of that chip by OR-wiring the CS-line with more Kx-outputs of the main 74145. (Don’t forget the address lines!) In case of the EPROM we also can tie switches to the surplus address lines and have the advantage of a multi-KERNAL system.

Schematics of the new KIM-1

What are the major differences with the original circuit:

Replacement of the 6530s by 6532s.
Replacement of the 6108 RAM-ICs by one 6264 or equivalent 8K*8 SRAM.
Adding an EPROM.
Adding a 74LS138 to decode the RAM and I/O of the 6532s.
Combining K6 and K7 to one line, dropping the resistor for K6.
Adding jumpers to enable combining other K-lines as well.

You may notice that Ruud did not change things which are more or less obvious like replacing the clock circuit by a module or replacing the various 74XX TTL-ICs by their LS or HCT equivalents.

6530’s KIM-1 specification

(Thanks to J Coville)
Back in the day, a designer ordering a custom 6530 would have to specify certain parameters in addition to the ROM contents. During my KIM-1 restoration effort, I found a datasheet for the Synertek version of the part. The datasheet has quite a bit of information describing how to provide the ROM contents. There is also a form for “Additional Pattern Information” (tables to describe the desired chip-select and addressing information). They look like this:

Chip Select Code (Check one square in each block)

CS1
PB6

CS2
PB5

Pull-up on PB7

YES
NO

ROM/RAM/I-O SELECTS (Specify H or L or N (don’t care) in each box.)

	RS	CS1	CS2	A9	A8	A7	A6
ROM Select				N	N	N	N
RAM Select
I/O Select

As best as I can determine, the designers of the KIM-1 filled out the tables for the RRIOTs like so:

6530-002:

CS1	X
PB6

CS2
PB5	X

Pull-up on PB7

YES
NO	X

	RS	CS1	CS2	A9	A8	A7	A6
ROM Select	L	H	N	N	N	N	N
RAM Select	H	L	N	H	H	H	H
I/O Select	H	L	N	H	H	L	H

6530-003:

CS1	X
PB6

CS2
PB5	X

Pull-up on PB7

YES
NO	X

	RS	CS1	CS2	A9	A8	A7	A6
ROM Select	L	H	N	N	N	N	N
RAM Select	H	L	N	H	H	H	L
I/O Select	H	L	N	H	H	L	L

In a KIM-1, K5 is asserted low by addresses 1400-17FF. It is connected to the CS1 lines of both the 6530-002 and 6530-003. A9 and A8 need to be 1 for all I/O and RAM, and A6 and A7 determine which chip and I/O or RAM you get:

0001 0111 00XX XXXX = 1700 – 173F = 6530-003 I/O
0001 0111 01XX XXXX = 1740 – 177F = 6530-002 I/O
0001 0111 10XX XXXX = 1780 – 17BF = 6530-003 RAM
0001 0111 11XX XXXX = 17C0 – 17FF = 6530-002 RAM

The RS lines are connected to different select lines, K6 for 6530-003 and K7 for 6530-002, this gives:
0001 10XX XXXX XXXX = 1800 – 1BFF = 6530-003 ROM (1k)
0001 11XX XXXX XXXX = 1C00 – 1FFF = 6530-002 ROM (1k)

All these values agree with the KIM-1 memory map documentation.

K0 $0000 – $03FF 1024 bytes of RAM (8*6102)
K1 $0400 – $07FF free
K2 $0800 – $0BFF free
K3 $0C00 – $0FFF free
K4 $1000 – $13FF free
K5 $1400 – $16FF free
$1700 – $173F I/O, timer of 6530-003
$1740 – $177F I/O, timer of 6530-002
$1780 – $17BF 64 bytes RAM of 6530-003
$17C0 – $17FF 64 bytes RAM of 6530-002
K6 $1800 – $1BFF 1024 bytes ROM of 6530-003
K7 $1C00 – $1FFF 1024 bytes ROM of 6530-002

K0..K7 = output lines from 74145

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A Christmas Story About A Tiny TIM

By Joseph Watson

I am a retired software engineer. I still program microcontrollers for fun. These days I concentrate on Microchip’s PIC chips, especially the PIC18 series chips. I retired from professional work at the end of 2010 and this year, 2016, I will turn 71 years old toward the end of the year.

Many years ago in 1971 at the ripe old age of 25, I bought a used DEC PDP-8/s minicomputer and played with it for many an hour. I even made a bit of extra money on the side by writing programs for that machine. (Yes, I still have the PDP-8/s.)

Early in 1975, a friend of mine bought a MITS Altair 8800 kit and invited me to help him build it. I was glad to help. That computer uses an Intel 8080 CPU chip. We soon had that machine blinking its lights and making strange noises in a nearby radio, but the fun seemed pretty limited for a little while.
Then a couple of college students named Bill Gates and Paul Allen wrote a BASIC interpreter for the Altair computer using the hitherto unknown company name of MicroSoft. My friend laid out the cash for the 4-kilobyte version of that product and we were soon writing BASIC programs for fun. Then my friend added an additional 4 kilobytes of RAM to his Altair and bought the 8-kilobyte version of MicroSoft BASIC. We spent many pleasant evenings in his basement writing BASIC programs for his machine. (By the way, my friend still has his Altair computer.)
In the era of the mid-1970s, microprocessor chips were still quite new but were becoming more known. The question on every would-be computer hobbyist’s lips was the same, “Which microprocessor chip is better, the Intel 8080 or the Motorola 6800?” I drooled over such things but, at more than a hundred dollars each, the cost surely seemed high for just a single silicon chip.
As I recall, some 8 guys who had been involved in the Motorola 6800 development left that company and joined MOS Technology, a calculator chip manufacturer, where about September of 1975 they created the very clever and much less expensive (about $25) MOS Technology 6502 CPU chip. Needless to say, my drooling intensified.

My TIM system got its start when my wife gave me, as a 1975 Christmas gift, just what I wanted most, a brand new MOS Technology 6502 microprocessor chip, a 6530-004 TIM chip, and 8 2102 static RAM chips. A 2102 RAM chip stores a whopping 1024 bits, organized as 1024 x 1. Those RAM chips ran so hot that you could not begin to touch them when they were operating.
I had a clear plastic box that I thought would make a nice enclosure for my TIM project. I took a large old printed circuit board and carefully stripped all the old parts and traces off of it to create a solid surface upon which to mount most of my circuitry, sort of a fiberglass chassis. I built up a simple 5-volt power supply to power the system consisting of a 120VAC to 12.6VAC transformer, a fuse, 4 1N2071 diodes wired as a full-wave bridge rectifier, a 2000 MFD 40 VDC filter capacitor, and a 7805 5-volt regulator. A long piece of aluminum running the length of the front side of the plastic box serves as the heat sink for the reguator. See Fig 1.

The CPU and the TIM chips were installed on a small perf board that was then glued with epoxy cement standing on edge on the large board inside the box. Additional components on this CPU/TIM board include a couple of 7400 quad 2-input NAND gate chips that I scraped up, about 9 resistors, a few small capacitors, and a couple of transistors that were involved in transmitting and receiving the 20-milliamp current loop signals for the Teletype. See Figs 2 and 3.

The 6502 supports several methods of being clocked. One uses a very simple external RC circuit so I chose that one. I included a potentiometer in the RC circuit so I could adjust the clock speed if needed. Since the TIM uses an autobaud feature to determine the timing for the serial interfaces, the clock speed needed only to be relatively constant but not any particular speed. See Figs 2 and 3.

I included a couple of red LEDs on the CPU/TIM board to reveal the state in the interface current loops with the Teletype, one for the sending side and one for the receiving side. (By the way, when I built this, we only had red colored LEDs. I had seen my very first LED in 1971, just 5 years earlier.) See Figs 2 and 3.

Aside from the CPU, TIM chip, and the RAM chips, most of the parts in this machine were salvaged parts scrounged from other old equipment and my spare parts box. The power transformer came from a nearby Radio Shack store. The IC sockets were wire wrap sockets that I unwrapped from old prototype boards being thrown out where I worked. However, I had no wire wrap tool so everything in the TIM system was soldered point-to-point.
Three push buttons were installed through the top of the plastic box for Reset, NMI, and IRQ. For the most part, only the Reset button was ever used. I may have used IRQ a few times. See Fig 4.

I made a little fan to keep the whole thing cool. The fan consisted of a small DC motor with a homemade aluminum fan blade on it. Eventually, I determined that the fan was just way to small for the amount of heat generated in this plastic box so I removed the fan and started using an external fan to cool it. All that remains of the old fan idea is the hole where it used to be located. See Fig 5.

As with many TIM systems, mine was connected to an ASR-33 Teletype unit. (Yes, I still have the Teletype, too.) Therefore, 10 bytes per second was the blazing speed for printing and for loading a program via 8-channel punched paper tape. I brought the serial lines out to a 37-pin connector on the side of the box. (Only slight overkill there… a 37-pin connector with only 4 electrical connections needed. One never knows when one will find a need for 33 spare pins.) See Fig 6.

I brought all the spare I/O port lines out to a connector on the side of the plastic enclosure so I could easily attach experimental interface circuitry there. See Fig 6.
To maximize cooling for the blistering hot RAM chips, I stood them on end, hoping for a degree of chimney effect cooling. They were all mounted in sockets as were all the chips of the project. Right from the beginning, I allowed room for an additional 24 2102 RAM chips so the system could grow from 1 kilobyte to 4 kilobytes of RAM. Standing the RAM chips on end resulted in one of the oddest physical wiring tricks in anybody’s computer and which is, no doubt, evident in the photos. Notice that much of the RAM array wiring was done with bare wire. For most of the wire in this project and especially the RAM array wiring, I used telephone wire which is to this day, one of my favorite kinds of hookup wire when solid wire is the best choice. It was easily stripped to make the bare wires for the RAM array. See Figs 7 and 8.

Aside from the ICs being in their sockets and a few connectors to the outside world, virtually every interconnection in this machine is hard wired with no connectors. It is obvious to me by looking at it now that I built the CPU/TIM board and then glued it down expecting to never have to change anything on it. (I do see that I tacked a capacitor onto the back of it at some point.) Looking at it now, I am surprised by some of the construction methods I used at that early time in my life (I was 30 years old). We all learn a lot as we grow older.
One kilobyte is a pretty small memory in which to store one’s program so I soon added the 24 additional 2102 RAM chips resulting in a total of 4 kilobytes of RAM. But that also made the little computer run really hot as well. So I added a slide switch to the system to choose whether it should run with 1 kilobyte or 4 kilobytes of RAM. That switch simply turns the power on or off to the extra RAM chips, thereby sometimes making life easier on the poor 7805 that was struggling to supply power to all those hot chips. See Fig 9.
There is a 74154 4-line to 16-line decoder that is involved in address decoding for the RAM chips (and for the EPROM chip described below). See Fig 10.

One reason for extending the RAM was that I found out about the existence of Tom Pittman’s Tiny Basic for the 6502 which cost a very reasonable $5 at the time. I loaded that little integer BASIC system and played with it often. Tom’s implementation is very compact and much could be accomplished even in a mere 4 kilobytes.

I wrote a number of assembly language programs as well. Clearly, the best one I ever wrote was a program to control a large set of Christmas lights that I strung across the front of my house. Each evening while I was on my way home from work, my wife would place a carefully prepared paper tape into the Teletype reader, turn on the power to the entire system, press the system Reset button, and turn on the Teletype reader. The tape contained a Carriage Return character to allow the TIM to determine the baud rate. After that came a TIM command telling it to load. Then came the machine code for the Christmas light program. When loading completed, one final TIM command on the tape started the program to running and the Christmas lights did their thing. It was always fun to arrive home and see my Christmas lights doing their dance before I even arrived. I used this little computer to run my Christmas lights so many times that it became clear that it would be smart to store the Christmas light program in an EPROM chip instead of loading it every evening from a paper tape. So I then added another slide switch inside the machine to optionally disable the TIM chip and enable a 2716 EPROM (2 kilobytes) plus a 7420 dual 4-input NAND gate chip (probably for address decoding) tucked into a corner of the box. When switched to the Christmas light position, one only had to power up the computer and press the Reset button to get the lights to go. By the way, there is no power switch other than plugging in or pulling out the power cord. See Figs 11 and 12.

The 7400 series chips are plastic and one 2102 chip is plastic. (I think I had to replace one of the original 2102 chips later because it had a habit of dropping bits, hence the plastic one.) Every other chip, including the 6502 and the 6530-004 TIM chip, are ceramic chips.

Looking over this little system after all these years, I have rediscovered many things about it that I had forgotten, most of which I have mentioned above. There is one more thing that I find of interest and that is the date codes. The 6502 CPU chip has a date code of 4775 meaning it was manufactured just about 4 weeks before I received it for Christmas. The 6530-004 TIM chip has a date code of 5075 meaning it must have still been a little bit warm when I got it as it had been made a mere week or so before it found its way under my Christmas tree. See Figs 13 and 14.
For those in the know, one might ask if my 6502 CPU chip includes the ROR (Rotate Right) instruction. Frankly, I can no longer remember if it does or not. I do remember the discussions about the issue of the earliest 6502 chips not having it.