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Jolt

On this page:


Jolt was the first 6502 singleboard computer. On December 1975, the coveted inside-front-cover of Byte magazine contained a two-page advertisement for “the world’s lowest cost computer system”. This was perhaps the first non-MOS Technology 6502 based computer system to come to market, The computer was named Jolt, and it was marketed by Microcomputer Associates Inc. (MAI) as both a kit for $249, or fully assembled and tested for $348 (Dec. 1975 Byte). Microcomputer Associates also sold add-ons for the basic system. They included 4 kilobytes for $265, an I/O card for $96, and a power supply for $145. Either at that time or shortly later MAI expanded the line to a RAM card and an EPROM card using 2702 PROMS. The boards were about 4″x6″ arranged in a vertical stack jointed by a ribbon cable. Only 5 volt power was needed. Software available in PROM was RAP (Resident Assembler Program) and Tiny Basic from Tom Pittman.

As can be seen in the photos of the Jolt front, back and experimenters card below, the system is quite simple. In fact it is a TIM system (the 6530-004 is the middle IC), with a 6502 at the right and a 6820 PIA on the right. Some glue logic on the right and the top, RAM on the bottom (4x 2111 for 512 byte memory) and RS232 TTY interface at the right (1488, 1489 line drivers). The system clock was a RC at 750 KHz, in the photo the clock is a 1 MHz crystal added later.
The TIM IC, 6530-004,contains the ROM (1K), timers, 128 byte RAM, 16 I/O) and 64 bytes RAM. The PIA 6820 adds another 16 bit I/O.

JOLT SPECIFICATIONS SUMMARY

(See the Microcomputer Associates Catalog in PDF format here)
• MOS Technology 6502 CPU
• MOS Technology 6530 with DEbug MONitor (a 6530-004 TIM)
• 750 KHz clock operation-RC controlled or crystal controlled with user supplied crystal.
• 512 bytes RAM
• 64 bytes RAM-located at interrupt vector locations
• Expandable address data lines
• Direct drive to 8 K bytes of memory
• 26 Programmable I/O lines
• Two hardware interrupts
• Serial interface for 20 ma current loop and EIA RS232C
• 4.25″ x 7″ printed circuit card
• Compatible with other JOLT cards

Documents

Jolt User Newsletter
DEMON software manual
(this manual has an alternative listing of the TIM 6530-004 monitor)

JOLT SYSTEM DESCRIPTION

The JOLT system consists of a set of modular microcomputer boards which can be used singly or tied together to produce any desired microcomputer system configuration. The minimum system is one CPU board. which alone constitutes a viable computer system complete with central processor. 1/0. interrupts. timer. read/write memory. and a complete software debug monitor in read-only memory. Additional boards in the JOLT system include a 4 K byte RAM , 1/0. Power Supply and blank Universal Interface board. A large JOLT system could have up to 32 K bytes of RAM memory. up to 128 lines of bidirectional 110 and 16 interrupts. JOLT boards come in kit form or assembled. and are ready to use in any form. from home hobby kits to industrial applications. All JOLT components are new. fully tested and fully warranted by MAI.

CPU
The internal oscillator operates in a “free run” mode with a capacitor and variable resistor supplied on the CPU printed circuit board. The frequency of oscillation may be adjusted with the variable resistor. If a very stable clock is required by the system a crystal may be added to the CPU board.
The RESET input to the CPU is pulled to logic ground by an RC circuit (t=33 milliseconds) on the printed circuit board. The CPU normally fetches a new program count vector from hex locations FFFC and FFFD upon activation of the RESET line, but these locations are in the interrupt vector RAM and therefore volatile. Hardware on the CPU board causes the CPU to begin executing the monitor program by forcing the effective sixteenth bit of the address bus  to a logic ZERO during reset. As a result, the RESET function on the JOLT CPU card causes the debug monitor (DEMON) to begin executing.
There are two interrupt inputs to the CPU. One interrupt is maskable under program control (IRQ) and the other (NMI) is not.
A READY control line provides for asynchronous operation with slow memory or I/O devices.
The address bus (A0-A15). the data bus (00-07). the two phase clock (PHI). the reset line (RESET). the interrupt lines (IRQ and NMI). and the ready line (RDY) are all available at the edge connector of the CPU board. The loading restrictions should be considered when using the signal lines driven by the CPU for external system expansion.

Program RAM
There are 512 bytes of program RAM provided on the CPU card. The program RAM is hardwired addressed as the first 512 bytes of the CPU’s 64 K of memory address space. It may become necessary to remove these RAM’s from their sockets if a 4 K memory card is also hardwired in this address space. The program RAM on the CPU card uses NMOS RAM chips type 2111, 512×4 bytes.

Monitor ROM and Interrupt Vector RAM
The monitor ROM is located in the last 1 K bytes of the lower half of memory space (first 32 K bytes). The interrupt vector RAM is located in the last 64 bytes of the 64 K memory address space. The monitor ROM and the interrupt vector RAM as well as additional I/0 are implemented with a single 6530 chip, the 6530-004 TIM

Programmable User I/0
The programmable I/0 lines available from the CPU card are provided by a Peripheral Interface Adapter (PIA) and a 6530 ROM chip. The PIA has two 8-bit 1/0 ports with two interrupt-causing control  lines each. Two jumpers are provided on the card which connects one or both PIA interrupt outputs to the CPU IRQ interrupt line. Refer to the CPU assembly drawing for proper identification of the jumpers. A Data Direction Register for each port determines whether each 1/0 line is an input or an output.  The 6530 ROM chip provides 10 additional I/O lines that may also be specified as input or output lines under program control. There are eight 1/0 lines from one port on the 6530 and two 1/0 lines from the second port. These I/0 lines may be used in conjunction with DEMON for interfacing a high speed paper tape reader to the CPU card. In the paper tape reader application, the eight 1/0 lines from one port are used as inputs and two I/0 lines from the second port are used to accomplish the handshake control between the reader and the CPU card.
The PIA is hardwired addressed as location 4000 to 4003 in the memory address space. Memory addresses from 4000 to 4003 are allocated for PIA devices so that the JOLT system may be easily expanded to accommodate up to eight PIA chips. The 6530 uses addresses from 6200 to 6E07 for eight I/0 functions. The unused memory addresses occur because address bits A10 and A11 are ignored to simplify address decoding. The 6530 I/0 lines may be referred to as Monitor I/0 because these lines are commonly used for a high speed paper tape interface.
See the TIM page for more information on timers and I/O.

Standard Interface Circuits
The JOLT CPU card provides direct interfacing with a 20 mA current loop and RS232C terminal. The 20 mA current loop requires +5 v and -10 v whereas the RS232C interface requires +12 v and -10 v. Both interfaces are wired in parallel on the input and output thereby allowing both interfaces to be used simultaneously.

JOLT SYSTEM MEMORY MAP
The memory map on the following charts explains what functions have been assigned to each segment of the JOLT address space. It is recommended that users respect this space allocation when adding memory and peripherals to their JOLT systems. Space has been reserved for 32 K bytes of user RAM or ROM, seven additional PIA devices, and up to 512 user I/O device registers. Other areas are reserved for JOLT expansion, new JOLT peripherals and memory options will use these spaces. Users are advised to not use JOLT expansion space unless absolutely necessary. Note that some areas used by the JOLT CPU board and PIA boards have more space indicated than there are registers or locations in the device occupying them. This is because these devices do not decode all address bits, or use some of the address bits for special functions. For example, the 6530 timer determines the time scale and interrupt enable/disable by the address used to access it. Thus, these “partly filled” areas are actually entirely used and are not available for other uses.

(1) Standard on JOLT CPU board.
(2) Available to user-not used by DEMON.
(3) To get enable-interrupt address, add 0008 to disable-interrupt address with corresponding functions.
(4) Reserved for DEMON use, TTY control and reset functions

History of Jolt Serial One, Bill Ragsdale (from http://www.old-computers.com/) 

Jolt was designed and developed by Raymond M. Holt, Founder and Executive Vice-President of Microcomputer Associates. Holt went on to design the SYM-1 single-board computer, a KIM-1 clone. In the late 1990’s Holt was finally given government permission to discuss his role in the development of the F-14 Tomcat. Holt claims he designed and developed the worlds first microprocessor one year before Intel.
Manny Lemas was the co-founder of Microcomputer Associates, Inc. Ray Holt was the hardware side and he was the software side of the business. He wrote the DEMON (Debugger/Monitor) software for the JOLT.
This software was actually developed for MOS Technology for use in the TIM chip and the KIM-1 single board computer. M.A. was granted rights to its own version of the software for use in the JOLT, they used the TIM 6530-004 IC!

I bought the first Jolt microcomputer out the door. I saw its advertisement (in Byte?) and was just starting a project in security access control. We were doing a crash project to demonstrate reading magnetic striped ID badges for Honeywell. We needed to accept a real-time bit sequence, extract numeric data and do a simple name vs. number lookup. An ideal job for a small processor. But remember, this was 1976. Development systems cost $5,000+ and none were offered for the 6502. (Later, MOS Technology offered one and Rockwell had a very good one.)
I ordered a Jolt system on a Wednesday or Thursday and was told Microcomputer Associates Inc. (Manny Lemas and Ray Holt) was awaiting the first silicon of their DeMon monitor to come by air from MOS Technology in two days, on Saturday. DeMon was a one chip Debug-Monitor containing 1K of ROM, 512 bytes of RAM, paralled IO, an ASCII serial interface and a monitor program. With the 6502 processor and a simple clock you could have a two-chip microcomputer. DeMon was later renamed Tim, Terminal Input Monitor.
MAI received their first DeMon chips about 9 AM Saturday morning, plugged in one, it ran, and I picked up the first unit at noon at their office. IIRC the Jolt had an inked-in serial number 0 or 1. Over the week-end I built a teletype interface as Jolt had a voltage output while the Teletype had current loop.

The Jolt is somewhat famous for the part it played in the development of the prototype Atari 2600 VCS, which was assembled using the Jolt computer board.

This photo is one of the original wirewrapped prototypes for “The Worlds Most Popular Video Game” aka… The Atari Video Computer System (VCS) Model #2600.    The interesting and eye catching part of the unit besides the extremely intricate hand wired area (TIA perhaps?) are the controllers, you look and say “Hey those don’t look like the standard CX-40 joysticks I’ve come to know and love all these many years!”   The controllers are actually from the Atari/KeeGames TANK coin-op arcade game.   The actual Atari VCS joysticks would later come from a home console game of TANK which was sold under the Sears exclusive brand label.   The Atari Tank joysticks for a one player would act as left and right treads on the home tank game and then they popped out of the rectangular home console and could be used for two player action and would allow each user to use one joystick just like Atari VCS Combat (CX-2601).

  The above prototype designed by Ron Milner and Steve Mayer in Grass Valley, Ca. at Cyan Engineering (a company owned by Atari, Inc.)is actually a combination of many parts.   The wirewrap board was the original version of the STELLA chip.  The boards to the right are a memory board and a “Jolt” 6502  board ) and on the far left is a 5V power supply.  The above Stella prototype had actually been thrown out in the garbage at Atari at one point. Owen Rubin, one of Atari’s first programmers had found it in the trash and recovered this piece of history and placed it into the safe hands of Atari’s Employee #3, who built the first Atari Pong, Allan Alcorn.

TIM-2 a ‘modern’ recreation of a TIM-1 system

Peter Renaud has designed a TIM system with a 6532, a 6502, some RAM, ROM and glue logic that runs the TIM ROM software.

Read here for the circuit diagram and assembler source.

TIM-2

The TIM-1 IC is a 6530, and since the 6532 is nearly identical with regards to I/O and timer facilities it is possible to construct a TIM system with the same software.

And that is what Peter Renaud has done. He took a 6532, a 6502, an EPROM (as replacement for the mask ROM in the 6530-004) and some RAM, some glue logic to build a system. See the cicuit diagram and source below (reproduced here with his permission).




Schematic in PDF format

TIM-2 assembler source (updated 2023)
Adapted for other I/O RAM and ROM addresses, functionally identical to the TIM ROM source.
Changes are (besides some assembler related)
– I/O base TIM = $6E00 TIM-2 = $6800
– ROM start TIM = $7000 TIM-2 $F000
– 64 Byte monitor reserve area TIM $FFC0 TIM-2 = $6000
– TIM-2 no INT Vectors area
– RS232 bit inverted
– 7 bit ASCII forced


An older version of the TIM-2 on the test bench of Peter.

Junior retronics articles

Elektor did write about the Junior and related designs in recent years, retro electronics! This site (at the present and previous wwww locations) was mentioned also.

Oh, and this is retro and has the name Elektor Junior but it is not a Junior computer!

Elektor gallery

Elektor Junior Articles and Books

6502, Junior and EC65(K)/Octopus publications by Elektuur and Elektor 1978 -1985

Books and Paperware Junior Computer, Elektor Computing 1-5:
Nederlands

English

German

Francais

Italino

Articles from the magazine Elektuur and Elektor 1978 -1985:
Nederlands
English
German
Francais
Italino
The dutch KIM/6502 Club published many articles on the 6502 and the Junior:
All Junior related articles here.
The whole archive is here: KIM 6502 Kenner archief

Elektor Junior software

Software for the Elektor Junior, if adapted, runs on the PM version of the system software, using the bit banged serial TTY I/O on the Interface card.

You find system software, such as ROM binaries, TM, PM etc with sources in the pages at Junior Elektor, from base to full system

On this page:

KB9 Basic
MICRO ADE
Tiny Basic
Comal
Microchess

ASMM/TED by CW Moser
Forth-79
Usurpator Chess
Various assembler sources as published in Elektor and the KIM Kenner
The Junior tapes


Microsoft KB-9 Basic V1.1

How to adapt KB-9 BASIC to the Junior

KB-9 stands for Microsoft BASIC V1.1 for the KIM-1 with 9 digits precision.
Scanned manual
The original KIM-1 KB9 Microsoft BASIC V1.1, binary and papertape KB9for Junior updated in BIN, hex dump and wave format
All the files here: archive with audio wave file, dump on terminal, binary and conversion software.
(See also Junior with KB9 and OS65DV3.3 – Retro Computing)

See the KIM-1 Software page for more information on KB-9 BASIC.


MICRO-ADE assembler/editor

Updated October 2022

MICRO-ADE was the working horse for many KIM-1 users,

the small and powerful assembler/editor/disassembler written by Peter Jennings, Microware.
Manual and program are placed here with permission by Peter Jennings

to the KIM Club (thank you Peter for this and for a great program!)

A letter sent by Anton Muller, KIM User Club the Netherlands,

to Peter Jennings, thanks Peter for the scan!

In August 2021 I (Hans Otten) typed in the source of MICRO-Ade from the listing in the manual, the output is binary compatible with the binaries I saved from tape and are tested on the KIM-1.
The result is a source identical (in standard MOS Technology assembler format) to the listing and binary identical to the page image. I also made new high quality scan of the manual and the listing.
Micro Ade program source and binary
Scanned manual
Scanned listing

Read in the KIM KENNER archive the source of the enhancements (text by S.T. Woldringh o.a.)
The KIM club enhanced Micro Ade to version 8. Download here the binary with a 2 page command summary.
MICRO-ADE V8
The Elektor Junior seems to be designed for MCIRO ADE: the Interface card has two relais to control the motor of an audio cassette recorder, just as MICRO ADE wants.
You see that the system software of the Junior (ESS503, the monitor, PM, TM, PME, PMV, Universal Terminal is written in the MICRO ADE dialect of assembler.


Tiny Basic

Tom Pitman’s Tiny basic.
Small enough to fit in the 1K KIM-1, yet a real Basic interpreter

See the KIM-1 Tiny Basic page for more information on Tiny Basic, articles, binaries, sources, how to adapt to the Junior.


COMAL

COMAL is an interpreted structured language. I have only as original the KIM User Club Elektor Junior version, and as with most of the 6502 SBC programs, not that difficult to adapt to a KIM-1, as shown in the last pages of the manual (in/out/break character, load/save tape, memory layout).
KGN COMAL binary
Manual KGN COMAL (dutch)
Partial commented disassembly of Comal


Microchess for the KIM-1

Updated October 2022

MICROCHESS for the KIM-1. Another Peter Jennings Microware product.
Runs on a standard KIM-1. Control via LED displays and hex keypad.
Quite a commercial success, many sold!

Microchess has been adapted for the Elektor Junior by Sjaak de Wit, sjelabs.nl.
Description of the adaptation
Source and binary of Microchess for the Elektor Junior

Wave files of tape and binaries, dump of my cassette files
Assembler source and binaries, typed in by me in 2021, binary identical to tape
Original manual (from the reseller The Computerist) scanned by me
Original manual by Peter Jennings
Manual in HTML format
Article on upgrading/extending Microchess, Compute II Issue 1, pdf format
Article on upgrading/extending MICROCHESS, Compute II Issue 1, html format
Upgraded/extending assembler source and binaries, typed in by me in 2021
More chess openings, Fer Weber 1978


6502 Macro Assembler and Text Editor CW Moser

CW Moser ASSM/TED Assembler and Text Editor binaries: original, KIM-1, Elektor Junior
Manual scanned in PDF format (with appendix for KIM-1 adaptations)

Sources of CW Moser for 65C02 and Junior binaries
Color version of later manual
Dissecting C. W. Moser’s ASSM_TED, Compute! Issue 11
Commodore PET version of the manual
Graphics Drawing Compiler for PET and SYM manual
Fast cassette interface for ASSM/TED by CW Moser
Universal 6502 Memory Test PET, Apple, Sym and Others, Compute! Issue 1


Usurpator Chess for the 6502

Usurpator Chess for the 6800 and 6502 in 2K, a book by H.G. Muller
The book, with source listings for 6800 and 6502
Binary
Source in CW Moser format

Various sources in assembler

MICRO ADE, ASSM/TED format as found in the Junior tapes.
All sources from the Junior tapes: Elektor programs, sources of MICRO ADE, ASSM/TED, Fort, Universal terminal, Elektor clock 222, Basicode for KB9 and more.


Junior tapes

With a Junior I bought second hand came a little booklet and a floppy. The previous owner must have been a active programmer, and he had saved his tapes on disk, the audio files were converted to binary files. The dump program is included!
I copied the floppy over to my computer, and hand typed in the description form the booklet.
If the file was a program, the binary was just a representation of it.
Text files were not that easy. A hex dump showd it were text files with some editor related extra’s, e.g. line numbers.
The files were the tape dumps of the editors used on the Junior: MICOR ADE and CW Moser.
After studying the dumps I wrote a program to recreate the text in normal DOS format. A GUI version first, later a CLI to easily convert the text filen and give it the name of the file instead of the numbering scheme.
The archive is a treasure, with Comal, MICOR ADE, CW Moser ASSM/TED, Forth binaries and sources for Junior and KIM-1. Some ROM dumps were present. And many assembler sources in MICEO ADE and CW Moser format. Here I present you the original archive, and the name/text converted one.

Junior tapes

The Junior tape archive
The Junior tape archive, text files decoded, files with correct names
The KIM-1 tape to text program
(Command line and GUI, Freepascal source included to decode text files from the Junior.


Forth

The FORTH language 6502 FIG-FORTH

Binary Forth original, start at 2000
FORTH assembler sources, 6502, 65C02
FORTH assembler sources, 6502, 65C02 in ASSM/TED format, Elektor Junior binaries
Fig-FORTH 6502 manual
Fig-FORTH Manuals May 1979

Junior deutsch


Junior Computer

Junior Monitor

Elektro uC-systeme

RS-232 Interface

Junior-Computer stellt sich selbst vor

Junior Speichererweiterung

Normalzeit-Empfänger für DCF-77

Junior Computer als “Atom-Uhr”

DCF-Computer-Schaltuhr

DCF-Computer-Schaltuhr ohne DCF

Junior Text

Power-On-Reset für den Junior-Computer

Junior-Journal

Junior-Computer Hardware vollendet

Junior-Computer: Interface-Karte

Junior-Computer: Systemsoftware wächst

IPROM

EPROM-Programmiergerät

Mini-EPROM-Karte

Disasembler …

uP als Minizähler

PSS Privater Software Service

Zeitansage …

Jnior-Computer als Telefon-Gebühren-Rechner

Junior-Vector-Gewinnung

Single Cycle für Junior Computer

Floppy-Disk für Junior part 1

Floppy-Disk für Junior part 2

Universelle Speicherkarte

Junior-Programmtester

ASCII-Tastatur

Parallel-Seriell-Wandler

RTTY-Terminal

Vector-Ansteuerung für den Junior

Busy-indicator für den Junior

Zeichen auf dem Bildscherm

VDU-Karte

Bildrausch-EX

6502-CPU-Karte

Buserweiterung

Omnibus

Indirekte dateien mit dem Junior

Den Junior macht musik

EPROMer für Z80

Adressdekodiering

EPROMer ohne Schnittstelle

Signal & zeit

6502-Tracer

Vectorfalle für 6502

EPROM-Umschaltung

SWAP

Echtzeituhr für Mikroprozessoren

Tracer für 6502

CPU-Taktgenerator

CPU-Bremse

Morsetraining mit dem Junior Computer
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Junior Elektor, from base to full system

The Junior Computer hardware and software is described in detail in the books and articles, see there for details.

On the following pages the essential information about the different parts are described: circuit diagrams, articles, ROM source and binaries etc.
It starts with a simple SBC: the base Junior. And it ends with a complete floppy disk and video based computer: the full Junior.


Note that the Junior has the Elektor bus and could use a lot of the cards developed later for the EC65/Octobus, but memory layout differences may require adaptations. Study articles and books, lots and lots of subtle changes required in every step.

Thanks to many contributors, for ROMs and information! Philippe Roca, Philippe Roehr, Keith Robinson, Guus Assmann, the people at forum.system-cfg.com , VzEkC e. V. (classic-computing.de), Bram Prosman, Ian Lockhart. If forget someone, I want to thank you!

Memory layout
An attempt to show the meory map of a fully enhanced Junior system.

Junior Nederlands

Nederlandstalige artikelen uit Elektuur 1980 en later.

1980
First article Junior Computer March 1980 in color
PDF file of the first two (dutch) articles 3-26 and 4-72 with the complete hardware design
All other Elektuur Junior articles 1980
March 1980 Junior-computer The introduction article
4-72 Junior-computer hexadecimal monitor dump
5-66 KIM Gebruikers Club promotion! nogmaals: junior-computer nog wat aanvullende gegevens
6-56 elektuur uP systemen
8-26 RS 232 interface
9-48 RAM/EPROM kaart 8K RAM + 4,8,16K EPROM
10-42 meer junior-geheugen, memory decode for RAM/EPROM card
11-71 Junior groeit!
1981
All other Elektuur Junior articles 1981
2-54 junior-tekst, show text on led displays
3-54 junior-journaal, practical tips
4-41 Junior-hardware kompleet (PDF file)
4-52 junior-software aangevuld
5-56 junior-uitbreidingen bouwrijp (PDF file)
6-53 Junior Computer als Voltmeter (G.Sullivan)
10-53 EPROM-Programmer
12-46 pseudo-ROM
1982
1-58 EPROMmer (P.R. Boldt)
All Elektuur Junior articles 1982
3-47 Junior spreekt Basic, adapt KIM KB-9 Basic to Junior
4-46 mini-EPROM-kaart
4-50 dynamische RAM-kaart
5-39 Software-uitpluizer (disassembler)
5-62 PSS Prive Software Service (EPROMmer)
5-67 Mini-teller met microprocesssor
7-59 Junior-vektoren ophalen (R. Mattysek)
7-46 single-cycle voor junior-computer (E.Kytzia)
9-74 konnektie tussen basis- en interface print
10-59 Van 6502 naar 6809
11-58 Floppy-disk interface voor junior en andere 6502-computers deel 1
12-26 floppy-disk interface deel 2 (Ohio Scientific DOS)
1983
1-66 verkeerslichtensturing (D. Herzberg)
All Elektuur Junior articles 1983
3-28 Universele geheugenkaart
5-60 morse-dekoder
5-37 junior-programmatester
5-38 ASCII keyboard
5-48 parallel-serie-omzetter voor ASCII keyboard
6-48 RTTY-dekoder
7-73 busy-indicator voor junior
7-73 Centronics interface 6522
7-79 vektor-aansturing voor junior
9-58 VDU kaart
9-66 de muzikale junior
9-74 64K op de dynamische RAM-kaart
10-57 basicode-2 voor de junior
10-72 EPROMmer zonder interfacekaart
11-68 universele terminal
12-42
Omnibus busprint
12-44 indirekte files op de junior
12-70 Bus uitbreiding de Elektuur bus
1984
All Elektuur Junior articles 1984
1-68 adresdekodering
2-75 Basicode-2 voor Junior met VDU-kaart
2-66 6502-tracer
3-40 Tapemonitor uitbreiding
4-53 ID-list
4-71 motorschakeling voor floppy drives
6-36 merge voor BASIC files
7-50 RES IRQ NMI indikator
7-68 2716 voor 2708
8-12 start-omleiding voor 6502
8-15 beeldruiskiller
9-72 DOS-uitbreidingen
11-33 de 6845 geprogrammeerd
1985
RAM als EPROM
swap routine voor 6502
6502 tracer
1978 – 1983 Elekterminal All articles in one
PDF file of issues 181 to 231