A program, SerialTester, a guide and test results.

About small SBC systems
A program, SerialTester, a guide and test results.

The Super Jolt is a evolution of the JOLT. Same CPU, 1 MHz clock, same TIM IC, same PIA, more RAM (1K), sockets for PROMS, RAP (Resident Assembler Program) and Tiny Basic (of Tom Pittman Itty Bitty Computers) in ROM.
Sold under the name CP110 by Synertek in 1985. Microcomputer Associates had become the core of Synertek Systems and in the next years produced the SYM SBC’s.


Downloads
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Superjolt CP110 User Manual Also Tiny Basic, RAP userguide |
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Superjolt CP110 Synertek |
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Cross assembler Manual, GE timeshare, as reference for the Resident Assembler program |
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DEMON software manual (this manual has an alternative listing of the TIM 6530-004 monitor) |
The Superjolt has a number of jumpers, explained in the manual page 3-5 and 3-6.


The schematic and photos below below shows on the right the patch to support 2716 EPROMs.

schematics[/caption]
Photos by Ray Holt of Microcomputer Associates.
On this page:
Jolt was the first 6502 singleboard computer. On December 1975, the coveted inside-front-cover of Byte magazine contained a two-page advertisement for “the world’s lowest cost computer system”. This was perhaps the first non-MOS Technology 6502 based computer system to come to market, The computer was named Jolt, and it was marketed by Microcomputer Associates Inc. (MAI) as both a kit for $249, or fully assembled and tested for $348 (Dec. 1975 Byte). Microcomputer Associates also sold add-ons for the basic system. They included 4 kilobytes for $265, an I/O card for $96, and a power supply for $145. Either at that time or shortly later MAI expanded the line to a RAM card and an EPROM card using 2702 PROMS. The boards were about 4″x6″ arranged in a vertical stack jointed by a ribbon cable. Only 5 volt power was needed. Software available in PROM was RAP (Resident Assembler Program) and Tiny Basic from Tom Pittman.
As can be seen in the photos of the Jolt front, back and experimenters card below, the system is quite simple. In fact it is a TIM system (the 6530-004 is the middle IC), with a 6502 at the right and a 6820 PIA on the right. Some glue logic on the right and the top, RAM on the bottom (4x 2111 for 512 byte memory) and RS232 TTY interface at the right (1488, 1489 line drivers). The system clock was a RC at 750 KHz, in the photo the clock is a 1 MHz crystal added later.
The TIM IC, 6530-004,contains the ROM (1K), timers, 128 byte RAM, 16 I/O) and 64 bytes RAM. The PIA 6820 adds another 16 bit I/O.
(See the Microcomputer Associates Catalog in PDF format here)
• MOS Technology 6502 CPU
• MOS Technology 6530 with DEbug MONitor (a 6530-004 TIM)
• 750 KHz clock operation-RC controlled or crystal controlled with user supplied crystal.
• 512 bytes RAM
• 64 bytes RAM-located at interrupt vector locations
• Expandable address data lines
• Direct drive to 8 K bytes of memory
• 26 Programmable I/O lines
• Two hardware interrupts
• Serial interface for 20 ma current loop and EIA RS232C
• 4.25″ x 7″ printed circuit card
• Compatible with other JOLT cards
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Jolt User Newsletter |
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DEMON software manual (this manual has an alternative listing of the TIM 6530-004 monitor) |
The JOLT system consists of a set of modular microcomputer boards which can be used singly or tied together to produce any desired microcomputer system configuration. The minimum system is one CPU board. which alone constitutes a viable computer system complete with central processor. 1/0. interrupts. timer. read/write memory. and a complete software debug monitor in read-only memory. Additional boards in the JOLT system include a 4 K byte RAM , 1/0. Power Supply and blank Universal Interface board. A large JOLT system could have up to 32 K bytes of RAM memory. up to 128 lines of bidirectional 110 and 16 interrupts. JOLT boards come in kit form or assembled. and are ready to use in any form. from home hobby kits to industrial applications. All JOLT components are new. fully tested and fully warranted by MAI.
CPU
The internal oscillator operates in a “free run” mode with a capacitor and variable resistor supplied on the CPU printed circuit board. The frequency of oscillation may be adjusted with the variable resistor. If a very stable clock is required by the system a crystal may be added to the CPU board.
The RESET input to the CPU is pulled to logic ground by an RC circuit (t=33 milliseconds) on the printed circuit board. The CPU normally fetches a new program count vector from hex locations FFFC and FFFD upon activation of the RESET line, but these locations are in the interrupt vector RAM and therefore volatile. Hardware on the CPU board causes the CPU to begin executing the monitor program by forcing the effective sixteenth bit of the address bus to a logic ZERO during reset. As a result, the RESET function on the JOLT CPU card causes the debug monitor (DEMON) to begin executing.
There are two interrupt inputs to the CPU. One interrupt is maskable under program control (IRQ) and the other (NMI) is not.
A READY control line provides for asynchronous operation with slow memory or I/O devices.
The address bus (A0-A15). the data bus (00-07). the two phase clock (PHI). the reset line (RESET). the interrupt lines (IRQ and NMI). and the ready line (RDY) are all available at the edge connector of the CPU board. The loading restrictions should be considered when using the signal lines driven by the CPU for external system expansion.
Program RAM
There are 512 bytes of program RAM provided on the CPU card. The program RAM is hardwired addressed as the first 512 bytes of the CPU’s 64 K of memory address space. It may become necessary to remove these RAM’s from their sockets if a 4 K memory card is also hardwired in this address space. The program RAM on the CPU card uses NMOS RAM chips type 2111, 512×4 bytes.
Monitor ROM and Interrupt Vector RAM
The monitor ROM is located in the last 1 K bytes of the lower half of memory space (first 32 K bytes). The interrupt vector RAM is located in the last 64 bytes of the 64 K memory address space. The monitor ROM and the interrupt vector RAM as well as additional I/0 are implemented with a single 6530 chip, the 6530-004 TIM
Programmable User I/0
The programmable I/0 lines available from the CPU card are provided by a Peripheral Interface Adapter (PIA) and a 6530 ROM chip. The PIA has two 8-bit 1/0 ports with two interrupt-causing control lines each. Two jumpers are provided on the card which connects one or both PIA interrupt outputs to the CPU IRQ interrupt line. Refer to the CPU assembly drawing for proper identification of the jumpers. A Data Direction Register for each port determines whether each 1/0 line is an input or an output. The 6530 ROM chip provides 10 additional I/O lines that may also be specified as input or output lines under program control. There are eight 1/0 lines from one port on the 6530 and two 1/0 lines from the second port. These I/0 lines may be used in conjunction with DEMON for interfacing a high speed paper tape reader to the CPU card. In the paper tape reader application, the eight 1/0 lines from one port are used as inputs and two I/0 lines from the second port are used to accomplish the handshake control between the reader and the CPU card.
The PIA is hardwired addressed as location 4000 to 4003 in the memory address space. Memory addresses from 4000 to 4003 are allocated for PIA devices so that the JOLT system may be easily expanded to accommodate up to eight PIA chips. The 6530 uses addresses from 6200 to 6E07 for eight I/0 functions. The unused memory addresses occur because address bits A10 and A11 are ignored to simplify address decoding. The 6530 I/0 lines may be referred to as Monitor I/0 because these lines are commonly used for a high speed paper tape interface.
See the TIM page for more information on timers and I/O.
Standard Interface Circuits
The JOLT CPU card provides direct interfacing with a 20 mA current loop and RS232C terminal. The 20 mA current loop requires +5 v and -10 v whereas the RS232C interface requires +12 v and -10 v. Both interfaces are wired in parallel on the input and output thereby allowing both interfaces to be used simultaneously.
JOLT SYSTEM MEMORY MAP
The memory map on the following charts explains what functions have been assigned to each segment of the JOLT address space. It is recommended that users respect this space allocation when adding memory and peripherals to their JOLT systems. Space has been reserved for 32 K bytes of user RAM or ROM, seven additional PIA devices, and up to 512 user I/O device registers. Other areas are reserved for JOLT expansion, new JOLT peripherals and memory options will use these spaces. Users are advised to not use JOLT expansion space unless absolutely necessary. Note that some areas used by the JOLT CPU board and PIA boards have more space indicated than there are registers or locations in the device occupying them. This is because these devices do not decode all address bits, or use some of the address bits for special functions. For example, the 6530 timer determines the time scale and interrupt enable/disable by the address used to access it. Thus, these “partly filled” areas are actually entirely used and are not available for other uses.
(1) Standard on JOLT CPU board.
(2) Available to user-not used by DEMON.
(3) To get enable-interrupt address, add 0008 to disable-interrupt address with corresponding functions.
(4) Reserved for DEMON use, TTY control and reset functions
History of Jolt Serial One, Bill Ragsdale (from http://www.old-computers.com/)
Jolt was designed and developed by Raymond M. Holt, Founder and Executive Vice-President of Microcomputer Associates. Holt went on to design the SYM-1 single-board computer, a KIM-1 clone. In the late 1990’s Holt was finally given government permission to discuss his role in the development of the F-14 Tomcat. Holt claims he designed and developed the worlds first microprocessor one year before Intel.
Manny Lemas was the co-founder of Microcomputer Associates, Inc. Ray Holt was the hardware side and he was the software side of the business. He wrote the DEMON (Debugger/Monitor) software for the JOLT.
This software was actually developed for MOS Technology for use in the TIM chip and the KIM-1 single board computer. M.A. was granted rights to its own version of the software for use in the JOLT, they used the TIM 6530-004 IC!
I bought the first Jolt microcomputer out the door. I saw its advertisement (in Byte?) and was just starting a project in security access control. We were doing a crash project to demonstrate reading magnetic striped ID badges for Honeywell. We needed to accept a real-time bit sequence, extract numeric data and do a simple name vs. number lookup. An ideal job for a small processor. But remember, this was 1976. Development systems cost $5,000+ and none were offered for the 6502. (Later, MOS Technology offered one and Rockwell had a very good one.)
I ordered a Jolt system on a Wednesday or Thursday and was told Microcomputer Associates Inc. (Manny Lemas and Ray Holt) was awaiting the first silicon of their DeMon monitor to come by air from MOS Technology in two days, on Saturday. DeMon was a one chip Debug-Monitor containing 1K of ROM, 512 bytes of RAM, paralled IO, an ASCII serial interface and a monitor program. With the 6502 processor and a simple clock you could have a two-chip microcomputer. DeMon was later renamed Tim, Terminal Input Monitor.
MAI received their first DeMon chips about 9 AM Saturday morning, plugged in one, it ran, and I picked up the first unit at noon at their office. IIRC the Jolt had an inked-in serial number 0 or 1. Over the week-end I built a teletype interface as Jolt had a voltage output while the Teletype had current loop.
The Jolt is somewhat famous for the part it played in the development of the prototype Atari 2600 VCS, which was assembled using the Jolt computer board.
This photo is one of the original wirewrapped prototypes for “The Worlds Most Popular Video Game” aka… The Atari Video Computer System (VCS) Model #2600. The interesting and eye catching part of the unit besides the extremely intricate hand wired area (TIA perhaps?) are the controllers, you look and say “Hey those don’t look like the standard CX-40 joysticks I’ve come to know and love all these many years!” The controllers are actually from the Atari/KeeGames TANK coin-op arcade game. The actual Atari VCS joysticks would later come from a home console game of TANK which was sold under the Sears exclusive brand label. The Atari Tank joysticks for a one player would act as left and right treads on the home tank game and then they popped out of the rectangular home console and could be used for two player action and would allow each user to use one joystick just like Atari VCS Combat (CX-2601).
The above prototype designed by Ron Milner and Steve Mayer in Grass Valley, Ca. at Cyan Engineering (a company owned by Atari, Inc.)is actually a combination of many parts. The wirewrap board was the original version of the STELLA chip. The boards to the right are a memory board and a “Jolt” 6502 board ) and on the far left is a 5V power supply. The above Stella prototype had actually been thrown out in the garbage at Atari at one point. Owen Rubin, one of Atari’s first programmers had found it in the trash and recovered this piece of history and placed it into the safe hands of Atari’s Employee #3, who built the first Atari Pong, Allan Alcorn.
Peter Renaud has designed a TIM system with a 6532, a 6502, some RAM, ROM and glue logic that runs the TIM ROM software.
Read here for the circuit diagram and assembler source.
The TIM-1 IC is a 6530, and since the 6532 is nearly identical with regards to I/O and timer facilities it is possible to construct a TIM system with the same software.
And that is what Peter Renaud has done. He took a 6532, a 6502, an EPROM (as replacement for the mask ROM in the 6530-004) and some RAM, some glue logic to build a system. See the cicuit diagram and source below (reproduced here with his permission).
TIM-2 assembler source (updated 2023)
Adapted for other I/O RAM and ROM addresses, functionally identical to the TIM ROM source.
Changes are (besides some assembler related)
– I/O base TIM = $6E00 TIM-2 = $6800
– ROM start TIM = $7000 TIM-2 $F000
– 64 Byte monitor reserve area TIM $FFC0 TIM-2 = $6000
– TIM-2 no INT Vectors area
– RS232 bit inverted
– 7 bit ASCII forced

An older version of the TIM-2 on the test bench of Peter.
To aid in the handling of KIM-1 program and dataformats I have written some programs for Windows and Linux (Raspberry Pi), sources included.
Convert 8 bit hex formats
KIM-1 simulator
Pascal-M cross compiler
KIM Tape WAV to BIN conversion
KIM Tape Convert BIN and BIN to WAV
KIMPaper
KIMPoser Tape Convert hex to WAV online
All programs come with source (Free Pascal Lazarus), compiled for Windows but thanks to Freepascal and Lazarus also compiled and tested on Linux (Ubuntu and Raspberry PI OS).
A general purpose utility to convert common 8 bit hex and binary formats, such as Intel HEX, Motorola S records, MOS Papertape, hex format, and binary files.
Version 2.9, June 2024. Define assembler output and bugfix MOS papertape format, PRG Commodore file format, TIM papertape format

Convert8bithexformat source files (Freepascal Lazarus).
Convert8bithexformat Setup for Windows, Executables for Ubuntu and Raspberry PI OS
Available formats:
– BIN binary, raw data, no formatting, no information on start address.
– HEX formatted as hex numbers raw data, no start address included.
– IHEX Intel hex 8 bit format, multiple memory block, start address included.
– PAP MOS Technology papertape format, multiple memory blocks, start address included.
– SREC Motorola 8 bit S record, contiguous memory block, start address included.
– A1hex Apple Woz monitor hex format, start address included.
– KIM Tape as used in the KIM-1 Simulator as emulation of audio tape files.
– assembler formatted bytes as .byte or your prefix text
– PRG files (binary with start address)
– TIM papertape format (MOS Papertape with simple end record)
6502/65C02 CPU emulation, disassembler, TTY, KIM-1 keypad and LEDs.
See the KIM-1 Simulator page for more information.

Note that the Conver8bitHexFormat program is also capable of converting to and from Papertape format from many more formats.
Originally written for the launch of the MicroKIM, an older version is on the support CD.
When you attach a serial device like the teletype or a modern PC with Hyperterminal you can use the KIM monitor of the KIM-1. One of the functions is loading from and saving to a papertape device on the teletype. Now since this is a way to load and save data as a textfile this is in fact quite useful.
The Micro-KIM triggered me to modernize my conversion utility for MOS Technology papertape format dating from 1983, VAX/VMS and Turbo Pascal. A Windows and a commandline/console version are available.
KIMPAPER for Windows

A program for Windows to convert between papertape and binary format.
Windows setup KIMPAPER
Sources (Freepascal Lazarus, build also on Linux)
KIMPAPER V1.1 for DOS
Not too modern, but handy, a commandline utility. Does exactly the same as the Windows program KIMPAPER. Runs fine in a commandline DOS box. Can also be compiled for Linux with Freepascal. In the KIMPAPER DOS archive the program, source and information on the program and papertape format can be found.
C:\MICROKIM\kimpaper KIM-1 MOS Technology BIN papertape format conversion utility, Hans Otten, 2007 v1.1 Syntax is: KIMPAPER [-[b|p] filename [startaddress] C:\MICROKIM\kimpaper -h KIM-1 Mos Technology BIN papertape format conversion utility, Hans Otten, 2007 v1.1 Syntax is: KIMPAPER [-[b|p|h] filename [startaddress] first parameter switches -h help -p convert to papertape -b convert to binary second parameter (first if no parameters, assumed binary to papertape) name of file to convert .BIN for binary, forces conversion to PAPertape .PAP for papertape, forces conversion to BINary third parameter (assumed 0000 if not present) startaddress for BIN to papertape conversion Files of type .BIN wil force conversion to papertape.PAP Files of type .PAP wil force conversion to binary .BIN Examples: C:\MICROKIM\kimpaper mastermind.bin 0200 KIM-1 Mos Technology BIN papertape format conversion utility, Hans Otten, 2007 v1.1 C:\MICROKIM>kimpaper mastermind.pap KIM-1 Mos Technology BIN papertape format conversion utility, Hans Otten, 2007 v1.1 Start address 0200 in file mastermind.BIN

KIM Tape to Text is a utility to convert between binary format of a KIM-1 tape dump to a DOS text file.
The KIM tape dump is a binary file and is just a dump of part of the memory of the KIM-1.
This binary file can be a text file as used in editors Micro Ade or CW Assm/TED.
By using the tape write routine in the KIM-1 one can write an audio file on cassette.
When this audio file is captured on a PC as WAV file (22K, mono) this can be converted back to a binary memory dump with ED’s Utility KIMTape
These text files can be converted to DOS text files with this utility.
First open the binary file. If this is recognized as Micro Ade or CW Moser format, the Save as text file can be used.
Windows program.
Full source for Freepascal and Lazarus, no Windows dependencies. Compiled on 64 bits Windows 10 as 32 bit application.
Note on detection of assembler editor type
1. Micro Ade file must start with CR: when present this is Micro Ade
line nr follows 2 byte
line ends with $0D
file ends with $40
2. Assm/Ted by CW Moser starts with line number $10 $00
end of line is high bit set
There may be rare situations that a file starts with a $0D or a different line nr. You can force CW Mose detection by changing this to a sequence of $10 $00 $0D and if necessary blanks $20 to make it consistent. If in doubts: use an editor that shows the file in hex (Ultra Edit, or the free Notepad ++, Text editor PRO) and study the tape file.
Methods to get the binary file out of a Junior or KIM-1.
Read the record tape into a binary with Ed’s KIMTAPE conversion *see below). It is MS-DOS and runs fine in VDOS (https://www.vdos.info/) or DOsbox (slow).
Make a note of start address as shown by KIMTAPE.
Non-printing ASCII characters are filtered out of the resulting text file.
Not my program, but so handy!
KIMTAPE v0.5 – tape conversion utility for KIM-1 and SYM-1 (2004-05-17) Local copy of http://dxforth.mirrors.minimaltype.com/#kimtape)
KIMTAPE allows programs stored on cassette tape to be decoded to a program file. It handles both MOS Technology KIM-1 and Synertek SYM-1 tape formats including HYPERTAPE. The reverse process – converting a program file to an audio wavefile is also possible, allowing one to produce perfectly regenerated cassettes. KIMTAPE works with 8-bit mono WAV, VOC or RAW audio files recorded
at 22050 samples per second.
Download: kimtap05.zip (MS-DOS) It is MS-DOS and runs fine in VDOS (https://www.vdos.info/) or DOSbox (slow).
The binary files in the KIM-1 program archives have been reproduced, from the original cassette recordings, with the tool KIMTAPE on a PC in a DOS box. See Eds DX-Forth and Utilities Page for this and other nice programs.
This program also makes it possible to reproduce the original cassette recordings that can be read by a KIM-1.
The files were made as follows: The KIM-1 cassette audio was connected to the PC audio input and (with e.g. Audacity) recorded as a wave file (mono 22KHz).
For example: qchess.wav
The wave file was then converted with KIMTAPE to a binary file (the exact content of of the KIM-1 memory when recorded).
And the KIMTAPE utility then displays load address (for example and tape ID
c:\kimtape qchess.wav qchess.bin KIMTAPE version 0.5 17-May-04 infile: qchess.wav outfile: qchess.BIN Program 01 address 0200 checksum OK xxxx bytes done
This .bin file (any extension is fine!) is NOT a wave file! It contains the exact content of the KIM-1 memory when recorded. The size is exactly the number of bytes as stored in the memory of the KIM-1 and much smaller than the wave file. This binary file can be converted back to a wave file with KIMTAPE or converted to a papertape file with KIMPAPER:
C:\kimtape -M -A0200 -D01 -B2 qchess.bin qchess.wav
As you can see: you have to specify the load address and the program ID. The B parameter indicates hypertape speed (2 here, slow)
The resulting wav file should be acceptable for the KIM-1. It is (as I have tested) acceptable as input for KIMTAPE!
All command parameters can be seen by typing KIMTAPE without parameters:
Executables of cross compiler, workflow, sources, command line utilities.

On these pages some information on the Jolt and Super Jolt and Microcomputer Associates.
Microcomputer Associates company played an important role in the 6502 SBCs, TIM, KIM-1 and SYM-1 all contain results of their work.
The company continued as Synertek Systems with the Superjolt, SYM-1 and more.
One of the first 6502 systems is the Jolt SBC. Built around the 6502 and the TIM 6530-004 RRIOT. The TIM software is developed by Micro Associates for MOS Technology.
The Jolt was superceded by the Superjolt, Micro Associates became Synertek Systems.
Read about the systems and Micro Associates:
New in my collection: a TIM IC! 6530-004 2577
An article from Micro February 1979 shows how to enhance the TIM monitor.
The base for all ‘modern’ KIM clones, KIM reproductions, MICRO KIM, PAL-1 and more.
Credits to Ruud Baltissen for the idea and details. The ‘I’ is Ruud from here in this page!
RRIOTs are mask programmed for address selection, choices are:
– Pin 18 PB6 or CS1
– Pin 19 PB5 or CS2
– Pin 17 PB7 can have a pullup
– ROM selection on RS0, CS1 und CS2 s
– RAM on RS0, CS1, CS2, A9, A8, A7 and A6
– I/O on RS0, CS1, CS2, A9, A8, A7 and A6
See the various 6530/6532 datasheets for (some) more detail.
The KIM-1 has two 6530s on board. For more info about this IC, please read the datasheet. Anybody who is a little bit familiar with the hardware market can tell you that you cannot buy the 6530 anymore. Happily enough there is another IC available which you could call its brother: the 6532. The 6532 has 16 I/O-lines, an internal timer and 128 bytes of RAM on board, but no ROM. The internal ROM of the 6530 can be selected independently from the I/O. So for this project we’ll use an external EPROM as replacement. The pin out of the 6532 is completely different but that should not be a problem.
The next difference is the fact that the 6532 has a separate IRQ and PB7 line. As we will see, the functionality of both lines is the same as with the 6530. To create the same circumstances we only have to connect them together.
The third difference is the availability of PB6 with a 6532. See it as a bonus as I haven’t found any reason how it could jeopardize our project.
The fourth difference is that it is possible to generate an interrupt depending on the behaviour of PA7. But this is an option, which is out of function by default after a reset.
The last and major difference however lays in the way the registers are selected:
function: RS: A6: A5: A4: A3: A2: A1: A0: R/W:
RAM 0 x x x x x x x x
DRA 1 x x x x 0 0 0 x A
DDRA 1 x x x x 0 0 1 x B
DRB 1 x x x x 0 1 0 x C
DDRB 1 x x x x 0 1 1 x D
PA7, IRQ off,
neg edge 1 x x 0 x 1 0 0 0 F
PA7, IRQ off,
pos edge 1 x x 0 x 1 0 1 0 G
PA7, IRQ on,
neg edge 1 x x 0 x 1 1 0 0 H
PA7, IRQ on,
pos edge 1 x x 0 x 1 1 1 0 I
read interrupt
flag 1 x x x x 1 x 1 1 E
read timer,
IRQ off 1 x x x 0 1 x 0 1 J
read timer,
IRQ on 1 x x x 1 1 x 0 1 K
Clock / 1,
IRQ off 1 x x 1 0 1 0 0 0 L
Clock / 8,
IRQ off 1 x x 1 0 1 0 1 0 M
Clock / 64,
IRQ off 1 x x 1 0 1 1 0 0 N
Clock / 1024,
IRQ off 1 x x 1 0 1 1 1 0 O
Clock / 1,
IRQ on 1 x x 1 1 1 0 0 0 P
Clock / 8,
IRQ on 1 x x 1 1 1 0 1 0 R
Clock / 64,
IRQ on 1 x x 1 1 1 1 0 0 S
Clock / 1024,
IRQ on 1 x x 1 1 1 1 1 0 T
In total 5 address lines are used, meaning 32 registers.
But 11 of the 19 registers have one or more mirrors.
Read: J E J E K E K E J E J E K E K E
Write: F G H I F G H I L M N O P R S T
R/W: A B C D A B C D A B C D A B C D
As we can see, the last 16 registers equal the 16 of the 6530 itself.
So now we have to develop some logic which will do the following:
Conclusion:
Here we have a luxury problem. We only need 2K of (EP)ROM like the 2716. The problem is that the 2716 is hard to find and more expansive then the 2764 or its bigger brothers. When we use a bigger EPROM we only have to tie the unused address lines to GND. The same problem occurs with the RAM.
If we have to use bigger RAMs or EPROMs anyway, it is quite easy to use other parts of that chip by OR-wiring the CS-line with more Kx-outputs of the main 74145. (Don’t forget the address lines!) In case of the EPROM we also can tie switches to the surplus address lines and have the advantage of a multi-KERNAL system.
What are the major differences with the original circuit:
You may notice that Ruud did not change things which are more or less obvious like replacing the clock circuit by a module or replacing the various 74XX TTL-ICs by their LS or HCT equivalents.
(Thanks to J Coville)
Back in the day, a designer ordering a custom 6530 would have to specify certain parameters in addition to the ROM contents. During my KIM-1 restoration effort, I found a datasheet for the Synertek version of the part. The datasheet has quite a bit of information describing how to provide the ROM contents. There is also a form for “Additional Pattern Information” (tables to describe the desired chip-select and addressing information). They look like this:
Chip Select Code (Check one square in each block)
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ROM/RAM/I-O SELECTS (Specify H or L or N (don’t care) in each box.)
| RS | CS1 | CS2 | A9 | A8 | A7 | A6 | |
| ROM Select | N | N | N | N | |||
| RAM Select | |||||||
| I/O Select |
As best as I can determine, the designers of the KIM-1 filled out the tables for the RRIOTs like so:
6530-002:
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| RS | CS1 | CS2 | A9 | A8 | A7 | A6 | |
| ROM Select | L | H | N | N | N | N | N |
| RAM Select | H | L | N | H | H | H | H |
| I/O Select | H | L | N | H | H | L | H |
6530-003:
|
|
|
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| RS | CS1 | CS2 | A9 | A8 | A7 | A6 | |
| ROM Select | L | H | N | N | N | N | N |
| RAM Select | H | L | N | H | H | H | L |
| I/O Select | H | L | N | H | H | L | L |
In a KIM-1, K5 is asserted low by addresses 1400-17FF. It is connected to the CS1 lines of both the 6530-002 and 6530-003. A9 and A8 need to be 1 for all I/O and RAM, and A6 and A7 determine which chip and I/O or RAM you get:
0001 0111 00XX XXXX = 1700 – 173F = 6530-003 I/O
0001 0111 01XX XXXX = 1740 – 177F = 6530-002 I/O
0001 0111 10XX XXXX = 1780 – 17BF = 6530-003 RAM
0001 0111 11XX XXXX = 17C0 – 17FF = 6530-002 RAM
The RS lines are connected to different select lines, K6 for 6530-003 and K7 for 6530-002, this gives:
0001 10XX XXXX XXXX = 1800 – 1BFF = 6530-003 ROM (1k)
0001 11XX XXXX XXXX = 1C00 – 1FFF = 6530-002 ROM (1k)
All these values agree with the KIM-1 memory map documentation.
K0 $0000 – $03FF 1024 bytes of RAM (8*6102)
K1 $0400 – $07FF free
K2 $0800 – $0BFF free
K3 $0C00 – $0FFF free
K4 $1000 – $13FF free
K5 $1400 – $16FF free
$1700 – $173F I/O, timer of 6530-003
$1740 – $177F I/O, timer of 6530-002
$1780 – $17BF 64 bytes RAM of 6530-003
$17C0 – $17FF 64 bytes RAM of 6530-002
K6 $1800 – $1BFF 1024 bytes ROM of 6530-003
K7 $1C00 – $1FFF 1024 bytes ROM of 6530-002
K0..K7 = output lines from 74145