Index MEMORY PLUS Manual By Lee Davison and Hans Otten Back to The Computerist

Previous page Next page

Page 8


					RAM Memory



	The Random Access Memory (RAM) used with MEMORY PLUS is 2102-type static RAM.
	Each 2102 chip contains 1024 bits of memory.  Any single bit is directly
	addressable.  By addressing eight chips in parallel, an eight bit word is
	accessed.  It takes eight 2102 chips to provide 1024 8-bit bytes.  The
	MEMORY PLUS provides 8K bytes of' 8-bit RAM (actually 8192 bytes).  This re-
	quires 64 2102 chips: eight chips per 1K times eight K.


	The 2102 chips used with MEMORY PLUS are synertek 21L02B or equivalent.
	This version of 2102 has the following basic parameters:

		SPEED:	450 nanosecond access time
		POWER:	30 milliamp worst case (these are "low power" chips)
			single +5 voltage required

	The MEMORY PLUS RAM is organized into a single contiguous 8K block of' memory.
	The location of the RAM in the MICRO addressing space is defined by a switch
	which may be set to start at any 8K boundary (2K hex boundary).  Looking at the
	board with the regulators at the top,  the RAM select switch is the left switch
	of the pair of rotary switches. Using the flat side of the switch as the position
	indicator, the addresses are set as follows:

					4			    4
				    6	    2			E	6

	On-board Address Select	  8    RAM	Not Selected	   ROM	  8
	Switches for RAM and ROM
				    A	    E			2	A
					C			    C


	The address associated with each position is:

		2K  2000 to 3FFF	Assumed as the RAM address in this manual.
		4K  4000 to 5FFF
		6K  6000 to 7FFF
		8K  8000 to 9FFF
		AK  A000 to BFFF
		CK  C000 to DFFF	Assumed as the ROM address in this manual.
		EK  E000 to FFFF	Not normally used for RAM since interrupt vectors
					must be defined in FFFA to FFFF if this memory is
					addressed.  See note in EPROM Memory about using
					this space for EPROM.

	The exact layout of the individual RAM chips may be found in a diagram in
	the section on "MEMORY PLUS Testing and Field Repair".








 


Previous page Next page
Page 8

Last page update: April 6, 2017.